C8051F045-GQR Silicon Laboratories Inc, C8051F045-GQR Datasheet - Page 206
![no-image](/images/manufacturer_photos/0/6/609/silicon_laboratories_inc_sml.jpg)
C8051F045-GQR
Manufacturer Part Number
C8051F045-GQR
Description
IC 8051 MCU 64K FLASH 64TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F04xr
Specifications of C8051F045-GQR
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
CAN, EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
32
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F045-GQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
- Current page: 206 of 328
- Download datasheet (3Mb)
C8051F040/1/2/3/4/5/6/7
SFR Definition 17.7, SFR Definition 17.10, and SFR Definition 17.13), a set of SFRs which are both byte-
and bit-addressable. The output states of Port pins that are allocated by the Crossbar are controlled by the
digital peripheral that is mapped to those pins. Writes to the Port Data registers (or associated Port bits)
will have no effect on the states of these pins.
A Read of a Port Data register (or Port bit) will always return the logic state present at the pin itself, regard-
less of whether the Crossbar has allocated the pin for peripheral use or not. An exception to this occurs
during the execution of a read-modify-write instruction (ANL, ORL, XRL, CPL, INC, DEC, DJNZ, JBC,
CLR, SET, and the bitwise MOV operation). During the read cycle of the read-modify-write instruction, it is
the contents of the Port Data register, not the state of the Port pins themselves, which is read.
Because the Crossbar registers affect the pinout of the peripherals of the device, they are typically config-
ured in the initialization code of the system before the peripherals themselves are configured. Once config-
ured, the Crossbar registers are typically left alone.
Once the Crossbar registers have been properly configured, the Crossbar is enabled by setting XBARE
(XBR2.4) to a logic 1. Until XBARE is set to a logic 1, the output drivers on Ports 0 through 3 are
explicitly disabled in order to prevent possible contention on the Port pins while the Crossbar reg-
isters and other registers which can affect the device pinout are being written.
The output drivers on Crossbar-assigned input signals (like RX0, for example) are explicitly disabled; thus
the values of the Port Data registers and the PnMDOUT registers have no effect on the states of these
pins.
17.1.2. Configuring the Output Modes of the Port Pins
The output drivers on Ports 0 through 3 remain disabled until the Crossbar is enabled by setting XBARE
(XBR2.4) to a logic 1.
The output mode of each port pin can be configured to be either Open-Drain or Push-Pull. In the Push-Pull
configuration, writing a logic 0 to the associated bit in the Port Data register will cause the Port pin to be
driven to GND, and writing a logic 1 will cause the Port pin to be driven to V
. In the Open-Drain configu-
DD
ration, writing a logic 0 to the associated bit in the Port Data register will cause the Port pin to be driven to
GND, and a logic 1 will cause the Port pin to assume a high-impedance state. The Open-Drain configura-
tion is useful to prevent contention between devices in systems where the Port pin participates in a shared
interconnection in which multiple outputs are connected to the same physical wire (like the SDA signal on
an SMBus connection).
The output modes of the Port pins on Ports 0 through 3 are determined by the bits in the associated
PnMDOUT registers (See SFR Definition 17.6, SFR Definition 17.9, SFR Definition 17.12, and SFR Defini-
tion 17.15). For example, a logic 1 in P3MDOUT.7 will configure the output mode of P3.7 to Push-Pull; a
logic 0 in P3MDOUT.7 will configure the output mode of P3.7 to Open-Drain. All Port pins default to Open-
Drain output.
The PnMDOUT registers control the output modes of the port pins regardless of whether the Crossbar has
allocated the Port pin for a digital peripheral or not. The exceptions to this rule are: the Port pins connected
to SDA, SCL, RX0 (if UART0 is in Mode 0), and RX1 (if UART1 is in Mode 0) are always configured as
Open-Drain outputs, regardless of the settings of the associated bits in the PnMDOUT registers.
17.1.3. Configuring Port Pins as Digital Inputs
A Port pin is configured as a digital input by setting its output mode to “Open-Drain” in the PnMDOUT reg-
ister and writing a logic 1 to the associated bit in the Port Data register. For example, P3.7 is configured as
206
Rev. 1.5
Related parts for C8051F045-GQR
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
![500SAAB8M00000ACF](/images/manufacturer_photos/0/6/609/silicon_laboratories_inc_tmb.jpg)
Part Number:
Description:
SMD/C°/SINGLE-ENDED OUTPUT SILICON OSCILLATOR
Manufacturer:
Silicon Laboratories Inc
![SI3210MFT](/images/manufacturer_photos/0/6/609/silicon_laboratories_inc_tmb.jpg)
Part Number:
Description:
Manufacturer:
Silicon Laboratories Inc
Datasheet:
![4010-DAAKF_868](/images/manufacturer_photos/0/6/609/silicon_laboratories_inc_tmb.jpg)
Part Number:
Description:
N/A N/A/SI4010 AES KEYFOB DEMO WITH LCD RX
Manufacturer:
Silicon Laboratories Inc
Datasheet:
![4010-DASKF_868](/images/manufacturer_photos/0/6/609/silicon_laboratories_inc_tmb.jpg)
Part Number:
Description:
N/A N/A/SI4010 SIMPLIFIED KEY FOB DEMO WITH LED RX
Manufacturer:
Silicon Laboratories Inc
Datasheet:
![4432-SEB1 C 915](/images/manufacturer_photos/0/6/609/silicon_laboratories_inc_tmb.jpg)
Part Number:
Description:
N/A/-40 TO 85 OC/EZLINK MODULE; F930/4432 HIGH BAND (REV E/B1)
Manufacturer:
Silicon Laboratories Inc
![4432-SEB1 D 470](/images/manufacturer_photos/0/6/609/silicon_laboratories_inc_tmb.jpg)
Part Number:
Description:
EZLink Module; F930/4432 Low Band (rev e/B1)
Manufacturer:
Silicon Laboratories Inc
![4460-TCE10D434-EK](/images/manufacturer_photos/0/6/609/silicon_laboratories_inc_tmb.jpg)
Part Number:
Description:
I°/4460 10 DBM RADIO TEST CARD 434 MHZ
Manufacturer:
Silicon Laboratories Inc
![4461-TSQ14D868-EK](/images/manufacturer_photos/0/6/609/silicon_laboratories_inc_tmb.jpg)
Part Number:
Description:
I°/4461 14 DBM RADIO TEST CARD 868 MHZ
Manufacturer:
Silicon Laboratories Inc
![4463-TCE20C460-EK](/images/manufacturer_photos/0/6/609/silicon_laboratories_inc_tmb.jpg)
Part Number:
Description:
I°/4463 20 DBM RFSWITCH RADIO TEST CARD 460 MHZ
Manufacturer:
Silicon Laboratories Inc
![4463-TCE20C868-EK](/images/manufacturer_photos/0/6/609/silicon_laboratories_inc_tmb.jpg)
Part Number:
Description:
I°/4463 20 DBM RADIO TEST CARD 868 MHZ
Manufacturer:
Silicon Laboratories Inc
![4463-TCE27F868-EK](/images/manufacturer_photos/0/6/609/silicon_laboratories_inc_tmb.jpg)
Part Number:
Description:
I°/4463 27 DBM RADIO TEST CARD 868 MHZ
Manufacturer:
Silicon Laboratories Inc
![4463-TCE30E915S-EK](/images/manufacturer_photos/0/6/609/silicon_laboratories_inc_tmb.jpg)
Part Number:
Description:
I°/4463 SKYWORKS 30 DBM RADIO TEST CARD 915 MHZ
Manufacturer:
Silicon Laboratories Inc
![4463-TCE30E915R-EK](/images/manufacturer_photos/0/6/609/silicon_laboratories_inc_tmb.jpg)
Part Number:
Description:
N/A N/A/-40 TO 85 OC/4463 RFMD 30 DBM RADIO TEST CARD 915 MHZ
Manufacturer:
Silicon Laboratories Inc
![4463-TSQ20D169-EK](/images/manufacturer_photos/0/6/609/silicon_laboratories_inc_tmb.jpg)
Part Number:
Description:
I°/4463 20 DBM RADIO TEST CARD 169 MHZ
Manufacturer:
Silicon Laboratories Inc