C8051F045-GQR Silicon Laboratories Inc, C8051F045-GQR Datasheet - Page 320
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C8051F045-GQR
Manufacturer Part Number
C8051F045-GQR
Description
IC 8051 MCU 64K FLASH 64TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F04xr
Specifications of C8051F045-GQR
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
CAN, EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
32
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F045-GQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
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C8051F040/1/2/3/4/5/6/7
25.1. Boundary Scan
The DR in the Boundary Scan path is an 134-bit shift register. The Boundary DR provides control and
observability of all the device pins as well as the SFR bus and Weak Pullup feature via the EXTEST and
SAMPLE commands.
318
EXTEST provides access to both capture and update actions, while Sample only performs a capture.
Bit
0
1
2
3
4
5
6
7
8
9
10, 12, 14, 16, 18,
20, 22, 24
11, 13, 15, 17, 19,
21, 23, 25
26, 28, 30, 32, 34,
36, 38, 40
27, 29, 31, 33, 35,
37, 39, 41
42, 44, 46, 48, 50,
52, 54, 56
43, 45, 47, 49, 51,
53, 55, 57
58, 60, 62, 64, 66,
68, 70, 72
59, 61, 63, 65, 67,
69, 71, 73
74, 76, 78, 80, 82,
84, 86, 88
Table 25.1. Boundary Data Register Bit Definitions
Capture Reset Enable from MCU
Update
Capture Reset input from /RST pin
Update
Capture Reset Enable from MCU
Update
Capture Reset input from /RST pin
Update
Capture CANRX output enable to pin
Update
Capture CANRX input from pin
Update
Capture CANTX output enable to pin
Update
Capture CANTX input from pin
Update
Capture External Clock from XTAL1 pin
Update
Capture Weak pullup enable from MCU
Update
Capture P0.n output enable from MCU (e.g. Bit6=P0.0, Bit8=P0.1, etc.)
Update
Capture P0.n input from pin (e.g. Bit7=P0.0, Bit9=P0.1, etc.)
Update
Capture P1.n output enable from MCU
Update
Capture P1.n input from pin
Update
Capture P2.n output enable from MCU
Update
Capture P2.n input from pin
Update
Capture P3.n output enable from MCU
Update
Capture P3.n input from pin
Update
Capture P4.n output enable from MCU
Update
Action
Target
Reset Enable to /RST pin
Reset output to /RST pin
Reset Enable to /RST pin
Reset output to /RST pin
CANRX output enable to pin
CANRX output to pin
CANTX output enable to pin
CANTX output to pin
Not used
Weak pullup enable to Port Pins
P0.n output enable to pin (e.g. Bit6=P0.0oe, Bit8=P0.1oe, etc.)
P0.n output to pin (e.g. Bit7=P0.0, Bit9=P0.1, etc.)
P1.n output enable to pin
P1.n output to pin
P2.n output enable to pin
P2.n output to pin
P3.n output enable to pin
P3.n output to pin
P4.n output enable to pin
Rev. 1.5
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