HD6417011VX20V Renesas Electronics America, HD6417011VX20V Datasheet - Page 113

MPU 5V 0K 100-QFP

HD6417011VX20V

Manufacturer Part Number
HD6417011VX20V
Description
MPU 5V 0K 100-QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7010r
Datasheet

Specifications of HD6417011VX20V

Core Processor
SH-2
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI
Peripherals
POR, PWM
Number Of I /o
11
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6417011VX20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Channel 0 (TIOR0L Register):
Bit 3:
IOC3
0
1
Note: When the BFA bit of TMDR0 is set to 1 and TGR0C is being used as a buffer register, these
102
Bits 7–4—Reserved. These bits always read 0. The write value should always be 0.
Bits 3–0—I/O Control C3–C0 (IOC3–IOC0): These bits set the TGR0C register function.
settings become ineffective and input capture/output compares do not occur.
Bit 2:
IOC2
0
1
0
1
Bit 1:
IOC1
0
1
0
1
0
1
0
1
Bit 0:
IOC0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Description
TGR0C
is an
output
compare
register
TGR0C
is an
input
capture
register
Output disabled (initial value)
Initial
output
is 0
Output disabled
Initial
output
is 1
Capture
input source
is the
TIOC0C pin
Capture
input source
is channel 1/
count clock
Output 0 on compare-match
Output 1 on compare-match
Toggle output on compare-match
Output 0 on compare-match
Output 1 on compare-match
Toggle output on compare-match
Input capture on rising edge
Input capture on falling edge
Input capture on both edges
Input capture
on TCNT1
count up/count down

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