HD64F2145BTE20 Renesas Electronics America, HD64F2145BTE20 Datasheet - Page 645

• Manufacturer Part Number: HD64F2145BTE20
• Description: IC H8S MCU FLASH 256K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of HD64F2145BTE20

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, SCI, X-Bus
• Peripherals: PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

21.3.2
ADCSR controls A/D conversion operations.
Bit
7
6
5
4
3
Bit Name
ADF
ADIE
ADST
SCAN
CKS
A/D Control/Status Register (ADCSR)
Initial Value
0
0
0
0
0
R/W
R/(W) *
R/W
R/W
R/W
R/W
Scan Mode
Description
A/D End Flag
A status flag that indicates the end of A/D conversion.
[Setting conditions]
[Clearing conditions]
A/D Interrupt Enable
Enables ADI interrupt by ADF when this bit is set to 1
A/D Start
Setting this bit to 1 starts A/D conversion. Clearing
this bit to 0 stops A/D conversion. In single mode, this
bit is cleared to 0 automatically when conversion on
the specified channel ends. In scan mode, conversion
continues sequentially on the specified channels until
this bit is cleared to 0 by software, a reset, or a
transition to standby mode or module stop mode.
Selects the A/D conversion operating mode. The
setting of this bit must be made when conversion is
halted (ADST = 0).
0: Single mode
1: Scan mode
Clock Select
Sets A/D conversion time. The input channel setting
must be made when conversion is halted (ADST = 0).
0: Conversion time is 266 states (max)
1: Conversion time is 134 states (max)
Switch conversion time while ADST is 0.
When A/D conversion ends in single mode
When A/D conversion ends on all channels
specified in scan mode
When 0 is written after reading ADF = 1
When DTC starts by an ADI interrupt and ADDR is
read
Rev. 3.00 Mar 21, 2006 page 589 of 788
Section 21 A/D Converter
REJ09B0300-0300