HD6417727BP160CV Renesas Electronics America, HD6417727BP160CV Datasheet - Page 323

• Manufacturer Part Number: HD6417727BP160CV
• Description: IC SH MPU ROMLESS 240BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of HD6417727BP160CV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 160MHz
• Connectivity: FIFO, SCI, SIO, SmartCard, USB
• Peripherals: DMA, LCD, POR, WDT
• Number Of I /o: 104
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.7 V ~ 2.05 V
• Data Converters: A/D 6x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 240-BGA
• Package: 240CSP
• Family Name: SuperH
• Maximum Speed: 160 MHz
• Operating Supply Voltage: 1.8|3.3 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 104
• Interface Type: SCI/USB
• On-chip Adc: 6-chx10-bit
• On-chip Dac: 2-chx8-bit
• Number Of Timers: 4
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Clock Mode
7
Note: * Taking input clock as 1
Cautions:
1. The frequency ranges of the input clock and crystal resonator should be set within the specified
2. The input to divider 1 becomes the output of PLL circuit 1 when PLL circuit 1 is on.
3. The input of divider 2 becomes the output of:
4. The frequency of the internal clock (Iφ) becomes:
frequency range based on the clock rate in table 10.4, and section 32.3, AC Characteristics.
•
•
•
•
PLL circuit 1
The product of the frequency of the CKIO pin, the frequency multiplication ratio of PLL
circuit 1, and the division ratio of divider 1 when PLL circuit 1 is on.
Do not set the internal clock frequency lower than the CKIO pin frequency.
Depending on the product, the clock ratio should be set to produce a frequency within one
of the ranges indicated below.
100 MHz products: 24 MHz to 100 MHz
160 MHz products: 24 MHz to 160 MHz
FRQCR
H'0100
H'0101
H'0102
H'0111
H'0112
H'0115
H'0116
H'0122
H'0126
H'012A
H'A100
H'A101
H'E100
H'E101
H'A111
PLL1
ON (× 1)
ON (× 1)
ON (× 1)
ON (× 2)
ON (× 2)
ON (× 2)
ON (× 2)
ON (× 4)
ON (× 4)
ON (× 4)
ON (× 3)
ON (× 3)
ON (× 3)
ON (× 3)
ON (× 6)
PLL2
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
Rev.6.00 Mar. 27, 2009 Page 265 of 1036
Section 10 On-Chip Oscillation Circuits
Clock Rate* (I:B:P)
1:1:1
1:1:1/2
1:1:1/4
2:1:1
2:1:1/2
1:1:1
1:1:1/2
4:1:1
2:1:1
1:1:1
3:1:1
3:1:1/2
1:1:1
1:1:1/2
6:1:1
REJ09B0254-0600