HD6417727BP160CV Renesas Electronics America, HD6417727BP160CV Datasheet - Page 838

IC SH MPU ROMLESS 240BGA

HD6417727BP160CV

Manufacturer Part Number
HD6417727BP160CV
Description
IC SH MPU ROMLESS 240BGA
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of HD6417727BP160CV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
160MHz
Connectivity
FIFO, SCI, SIO, SmartCard, USB
Peripherals
DMA, LCD, POR, WDT
Number Of I /o
104
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.7 V ~ 2.05 V
Data Converters
A/D 6x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
240-BGA
Package
240CSP
Family Name
SuperH
Maximum Speed
160 MHz
Operating Supply Voltage
1.8|3.3 V
Data Bus Width
32 Bit
Number Of Programmable I/os
104
Interface Type
SCI/USB
On-chip Adc
6-chx10-bit
On-chip Dac
2-chx8-bit
Number Of Timers
4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

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Part Number:
HD6417727BP160CV
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Part Number:
HD6417727BP160CV
Manufacturer:
Renesas Electronics America
Quantity:
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Section 25 LCD Controller
25.2.11 LCDC Horizontal Sync Signal Register (LDHSYNR)
LDHSYNR specifies the timing of the generation of the horizontal (scan direction) sync signals
(CL1/Hsync) for the LCD module.
Bits 15 to 12—Horizontal Sync Signal Width (HSYNW): Sets the width in characters of the
horizontal sync signals (CL1 and Hsync).
Subtract 1 from the setting (0 to 15 (H'F)).
Example: For a horizontal sync signal width of 8 dots
Bits 7 to 0—Horizontal Sync Signal Output Position (HSYNP): Sets the output position in
characters of the horizontal sync signals.
Subtract 1 from the setting (0 to 255 (H'FF)).
The following conditions must be satisfied: HTCN >= HSYNP + HSYNW + 1
Example: For an LCD module with a width of 640 pixels
Rev.6.00 Mar. 27, 2009 Page 780 of 1036
REJ09B0254-0600
Initial value:
R/W:
Bit:
HSYN
HSYNW = (8 dots/8 dots/character) – 1 = 0 = H'0
HSYNP = [(640/8) + 1] – 1 = 80 = H'50
In this case, the horizontal sync signal is active from the 648th through the 655th dot.
R/W
W3
15
0
HSYN
R/W
W2
14
0
HSYN
R/W
W1
13
0
HSYN
R/W
W0
12
0
11
R
0
10
R
0
HSYNP >= HDCN + 1
R
9
0
R
8
0
HSYNP
R/W
7
7
0
HSYNP
R/W
6
6
1
HSYNP
R/W
5
5
0
HSYNP
R/W
4
4
1
HSYNP
R/W
3
3
0
HSYNP
R/W
2
2
0
HSYNP
R/W
1
1
0
HSYNP
R/W
0
0
0

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