HD6417750SF167V Renesas Electronics America, HD6417750SF167V Datasheet - Page 726

• Manufacturer Part Number: HD6417750SF167V
• Description: MPU 3V 16K PB-FREE 208-QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417750SF167V

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 167MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 28
• Program Memory Type: ROMless
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 2 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Section 14 Direct Memory Access Controller (DMAC)
14.7
14.7.1
Initial value:
Initial value:
DMA source address registers 0−7 (SAR0−SAR7) are 32-bit readable/writable registers that
specify the source address for a DMA transfer. The functions of these registers are the same as on
the SH7750 or SH7750S. For more information, see section 14.2.1, DMA Source Address
Registers 0−3 (SAR0−SAR3).
14.7.2
Initial value:
Initial value:
Rev.7.00 Oct. 10, 2008 Page 640 of 1074
REJ09B0366-0700
R/W: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
R/W: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
R/W: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
R/W: R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Bit:
Bit:
Bit:
Bit:
2. In the SH7750R, writes from the CPU and writes from external I/O devices using the
Register Descriptions (SH7750R)
DMA Source Address Registers 0−7 (SAR0−SAR7)
DMA Destination Address Registers 0−7 (DAR0−DAR7)
DTR format are possible in DDT mode.
31
15
31
15
—
—
—
—
30
—
14
—
30
—
14
—
29
13
29
13
—
—
—
—
28
12
28
12
—
—
—
—
27
11
27
11
—
—
—
—
26
10
26
10
—
—
—
—
25
25
—
—
—
—
9
9
24
24
—
—
—
—
8
8
23
23
—
—
—
—
7
7
22
22
—
—
—
—
6
6
21
21
—
—
—
—
5
5
20
20
—
—
—
—
4
4
19
19
—
—
—
—
3
3
18
18
—
—
—
—
2
2
17
17
—
—
—
—
1
1
16
—
—
16
—
—
0
0