HD6417750SF167V Renesas Electronics America, HD6417750SF167V Datasheet - Page 741

• Manufacturer Part Number: HD6417750SF167V
• Description: MPU 3V 16K PB-FREE 208-QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417750SF167V

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 167MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 28
• Program Memory Type: ROMless
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 2 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

15.1
This LSI is equipped with a single-channel serial communication interface (SCI) and a single-
channel serial communication interface with built-in FIFO registers (SCI with FIFO: SCIF).
The SCI can handle both asynchronous and synchronous serial communication.
The SCI supports a smart card interface. This is a serial communication function supporting a
subset of the ISO/IEC 7816-3 (identification cards) standard. For details, see section 17, Smart
Card Interface.
The SCIF is a dedicated asynchronous communication serial interface with built-in 16-stage FIFO
registers for both transmission and reception. For details, see section 16, Serial Communication
Interface with FIFO (SCIF).
15.1.1
SCI features are listed below.
• Choice of synchronous or asynchronous serial communication mode
⎯ Asynchronous mode
Serial data communication is executed using an asynchronous system in which
synchronization is achieved character by character. Serial data communication can be
carried out with standard asynchronous communication chips such as a Universal
Asynchronous Receiver/Transmitter (UART) or Asynchronous Communication Interface
Adapter (ACIA). A multiprocessor communication function is also provided that enables
serial data communication with a number of processors.
There is a choice of 12 serial data transfer formats.
Data length:
Stop bit length:
Parity:
Multiprocessor bit:
Receive error detection: Parity, overrun, and framing errors
Break detection:
Section 15 Serial Communication Interface (SCI)
Overview
Features
7 or 8 bits
1 or 2 bits
Even/odd/none
1 or 0
A break can be detected by reading the RxD pin level directly
from the serial port register (SCSPTR1) when a framing error
occurs.
Section 15 Serial Communication Interface (SCI)
Rev.7.00 Oct. 10, 2008 Page 655 of 1074
REJ09B0366-0700