HD6417750SF167V Renesas Electronics America, HD6417750SF167V Datasheet - Page 819

• Manufacturer Part Number: HD6417750SF167V
• Description: MPU 3V 16K PB-FREE 208-QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7750r

Specifications of HD6417750SF167V

• Core Processor: SH-4
• Core Size: 32-Bit
• Speed: 167MHz
• Connectivity: EBI/EMI, FIFO, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 28
• Program Memory Type: ROMless
• Ram Size: 24K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 2 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

Bit 3—Stop Bit Length (STOP): Selects 1 or 2 bits as the stop bit length.
Bit 3: STOP
0
1
Notes: 1. In transmission, a single 1-bit (stop bit) is added to the end of a transmit character
In reception, only the first stop bit is checked, regardless of the STOP bit setting. If the second
stop bit is 1, it is treated as a stop bit; if it is 0, it is treated as the start bit of the next transmit
character.
Bit 2—Reserved: This bit is always read as 0, and should only be written with 0.
Bits 1 and 0—Clock Select 1 and 0 (CKS1, CKS0): These bits select the clock source for the on-
chip baud rate generator. The clock source can be selected from Pck, Pck/4, Pck/16, and Pck/64,
according to the setting of bits CKS1 and CKS0.
For the relation between the clock source, the bit rate register setting, and the baud rate, see
section 16.2.8, Bit Rate Register (SCBRR2).
Bit 1: CKS1
0
1
Note: Pck: Peripheral clock
2.
before it is sent.
In transmission, two 1-bits (stop bits) are added to the end of a transmit character
before it is sent.
Bit 0: CKS0
0
1
0
1
Description
1 stop bit *
2 stop bits *
1
2
Description
Pck clock
Pck/4 clock
Pck/16 clock
Pck/64 clock
Section 16 Serial Communication Interface with FIFO (SCIF)
Rev.7.00 Oct. 10, 2008 Page 733 of 1074
REJ09B0366-0700
(Initial value)
(Initial value)