UPD78F0500AMC-CAB-AX Renesas Electronics America, UPD78F0500AMC-CAB-AX Datasheet - Page 150

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UPD78F0500AMC-CAB-AX

Manufacturer Part Number
UPD78F0500AMC-CAB-AX
Description
MCU 8BIT 30SSOP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2r
Datasheet

Specifications of UPD78F0500AMC-CAB-AX

Core Processor
78K/0
Core Size
8-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
78K0/Kx2
Microcontrollers Self Programming Library Type01 User’s Manual (U18274E).
4.3 Memory Bank Select Register (BANK)
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
Notes 1. SM+ for 78K0, SM+ for 78K0/Kx2, and ID78K0-QB
For details, see the RA78K0 Ver. 3.80 Assembler Package Operation User’s Manual (U17199E) and the 78K0
The memory bank select register (BANK) is used to select a memory bank to be used.
BANK can be set by an 8-bit memory manipulation instruction.
Reset signal generation clears BANK to 00H.
Caution Be sure to change the value of the BANK register in the common area (0000H to 7FFFH).
Remark
Memory Bank Number
2. Set the memory bank to be used by the memory bank select register (BANK) (see Figure 4-3).
Memory bank 0
Memory bank 1
Memory bank 2
Memory bank 3
Memory bank 4
Memory bank 5
Address: FFF3H After reset: 00H R/W
Symbol
BANK
If the value of the BANK register is changed in the bank area (8000H to BFFFH), an inadvertent
program loop occurs in the CPU. Therefore, never change the value of the BANK register in the bank
area.
x = 2 to 4
BANK2
7
0
0
0
0
0
1
1
08000H-0BFFFH
Figure 4-3. Format of Memory Bank Select Register (BANK)
Other than above
Table 4-1. Memory Bank Address Representation
BANK1
CPU Address
6
0
0
0
1
1
0
0
Note 2
BANK0
5
0
0
1
0
1
0
1
Common area (32 KB) + memory bank 0 (16 KB)
Common area (32 KB) + memory bank 1 (16 KB)
Common area (32 KB) + memory bank 2 (16 KB)
Common area (32 KB) + memory bank 3 (16 KB)
Setting prohibited
Setting prohibited
μ
PD78F05x6 and 78F05x6A
08000H-0BFFFH
0C000H-0FFFFH
10000H-13FFFH
14000H-17FFFH
18000H-1BFFFH
1C000H-1FFFFH
Flash Memory Real Address
CHAPTER 4 MEMORY BANK SELECT FUNCTION
4
0
3
0
Bank setting
BANK2
2
Common area (32 KB) +
memory bank 4 (16 KB)
Common area (32 KB) +
memory bank 5 (16 KB)
78F05x7D, and 78F05x7DA
μ
08000H-0BFFFH
18000H-1BFFFH
28000H-2BFFFH
38000H-3BFFFH
48000H-4BFFFH
58000H-5BFFFH
PD78F05x7, 78F05x7A,
Simulator and Debugger
Address Representation in
BANK1
1
BANK0
0
Note 1
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