SAK-XC2765X-104F80L AA Infineon Technologies, SAK-XC2765X-104F80L AA Datasheet - Page 28

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SAK-XC2765X-104F80L AA

Manufacturer Part Number
SAK-XC2765X-104F80L AA
Description
IC MCU 32BIT FLASH 100-LQFP
Manufacturer
Infineon Technologies
Series
XC27x5Xr
Datasheet

Specifications of SAK-XC2765X-104F80L AA

Core Processor
C166SV2
Core Size
16/32-Bit
Speed
80MHz
Connectivity
CAN, EBI/EMI, I²C, LIN, SPI, SSC, UART/USART, USI
Peripherals
I²S, POR, PWM, WDT
Number Of I /o
75
Program Memory Size
832KB (832K x 8)
Program Memory Type
FLASH
Ram Size
50K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
100-LFQFP
Data Bus Width
16 bit, 32 bit
Data Ram Size
32 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
80 MHz
Number Of Programmable I/os
76
Number Of Timers
5
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
SP000443762
Table 5
Pin
79
80
81
Data Sheet
Symbol
P10.8
U0C0_MCLK
OUT
U0C1_SELO
0
U2C1_DOUT O3
AD8
CCU60_CCP
OS1A
U0C0_DX1C
BRKIN_B
T3EUDB
P10.9
U0C0_SELO
4
U0C1_MCLK
OUT
AD9
CCU60_CCP
OS2A
TCK_B
T3INB
P1.1
CCU62_COU
T62
U1C0_SELO
5
U2C1_DOUT O3
A9
ESR2_3
U2C1_DX0C
Pin Definitions and Functions (cont’d)
Ctrl.
O0 / I St/B
O1
O2
OH / I St/B
I
I
I
I
O0 / I St/B
O1
O2
OH / I St/B
I
I
I
O0 / I St/B
O1
O2
OH
I
I
Type Function
St/B
St/B
St/B
St/B
St/B
St/B
St/B
St/B
St/B
St/B
St/B
St/B
St/B
St/B
St/B
St/B
St/B
St/B
Bit 8 of Port 10, General Purpose Input/Output
USIC0 Channel 0 Master Clock Output
USIC0 Channel 1 Select/Control 0 Output
USIC2 Channel 1 Shift Data Output
External Bus Interface Address/Data Line 8
CCU60 Position Input 1
USIC0 Channel 0 Shift Clock Input
OCDS Break Signal Input
GPT12E Timer T3 External Up/Down Control
Input
Bit 9 of Port 10, General Purpose Input/Output
USIC0 Channel 0 Select/Control 4 Output
USIC0 Channel 1 Master Clock Output
External Bus Interface Address/Data Line 9
CCU60 Position Input 2
DAP0/JTAG Clock Input
GPT12E Timer T3 Count/Gate Input
Bit 1 of Port 1, General Purpose Input/Output
CCU62 Channel 2 Output
USIC1 Channel 0 Select/Control 5 Output
USIC2 Channel 1 Shift Data Output
External Bus Interface Address Line 9
ESR2 Trigger Input 3
USIC2 Channel 1 Shift Data Input
XC2000 Family Derivatives / Base Line
28
General Device Information
V2.0, 2009-03
XC2765X

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