SAF-XC161CJ-16F40F BB Infineon Technologies, SAF-XC161CJ-16F40F BB Datasheet - Page 48
![IC MCU 16BIT 128KB FLSH 144TQFP](/photos/39/69/396957/qfp144_sml.jpg)
SAF-XC161CJ-16F40F BB
Manufacturer Part Number
SAF-XC161CJ-16F40F BB
Description
IC MCU 16BIT 128KB FLSH 144TQFP
Manufacturer
Infineon Technologies
Series
XC16xr
Datasheet
1.SAF-XC161CJ-16F40F_BB.pdf
(88 pages)
Specifications of SAF-XC161CJ-16F40F BB
Core Processor
C166SV2
Core Size
16-Bit
Speed
40MHz
Connectivity
CAN, EBI/EMI, I²C, SLDM, SPI, UART/USART
Peripherals
PWM, WDT
Number Of I /o
99
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 2.7 V
Data Converters
A/D 12x8/10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-LFQFP
Data Bus Width
16 bit
Data Ram Size
8 KB
Interface Type
2xASC, 2xSSC, 1xSDLM, 1xI2C, J1850
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
99
Number Of Timers
9
Operating Supply Voltage
5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
Packages
PG-TQFP-144
Max Clock Frequency
40.0 MHz
Sram (incl. Cache)
8.0 KByte
Can Nodes
2
A / D Input Lines (incl. Fadc)
12
Program Memory
128.0 KByte
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Summary of Features
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Note: When a CAN node has the interface lines assigned to Port 4, the segment address
3.14
The integrated IIC Bus Module handles the transmission and reception of frames over
the two-line IIC bus in accordance with the IIC Bus specification. The IIC Module can
operate in slave mode, in master mode or in multi-master mode. It can receive and
transmit data using 7-bit or 10-bit addressing. Up to 4 send/receive data bytes can be
stored in the extended buffers.
Several physical interfaces (port pins) can be established under software control. Data
can be transferred at speeds up to 400 kbit/s.
Two interrupt nodes dedicated to the IIC module allow efficient interrupt service and also
support operation via PEC transfers.
Note: The port pins associated with the IIC interfaces must be switched to open drain
Data Sheet
CAN functionality according to CAN specification V2.0 B active
Data transfer rate up to 1 Mbit/s
Flexible and powerful message transfer control and error handling capabilities
Full-CAN functionality and Basic CAN functionality for each message object
32 flexible message objects
– Assignment to one of the two CAN nodes
– Configuration as transmit object or receive object
– Concatenation to a 2-, 4-, 8-, 16-, or 32-message buffer with FIFO algorithm
– Handling of frames with 11-bit or 29-bit identifiers
– Individual programmable acceptance mask register for filtering for each object
– Monitoring via a frame counter
– Configuration for Remote Monitoring Mode
Up to eight individually programmable interrupt nodes can be used
CAN Analyzer Mode for bus monitoring is implemented
output on Port 4 must be limited. CS lines can be used to increase the total amount
of addressable external memory.
mode, as required by the IIC specification.
IIC Bus Module
46
Functional Description
XC161CJ-16F
Derivatives
V2.4, 2006-08