SAK-TC1197-256F180E AC Infineon Technologies, SAK-TC1197-256F180E AC Datasheet - Page 170
![no-image](/images/manufacturer_photos/0/3/327/infineon_technologies_sml.jpg)
SAK-TC1197-256F180E AC
Manufacturer Part Number
SAK-TC1197-256F180E AC
Description
IC MCU 32BIT 2MB FLASH BGA416-10
Manufacturer
Infineon Technologies
Series
TC11xxr
Datasheet
1.SAK-TC1197-256F180E_AC.pdf
(183 pages)
Specifications of SAK-TC1197-256F180E AC
Core Processor
TriCore
Core Size
32-Bit
Speed
180MHz
Connectivity
ASC, CAN, EBI/EMI, MLI, MSC, SSC
Peripherals
DMA, POR, WDT
Number Of I /o
219
Program Memory Size
2MB (2M x 8)
Program Memory Type
FLASH
Ram Size
224K x 8
Voltage - Supply (vcc/vdd)
1.42 V ~ 1.58 V
Data Converters
A/D 48x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
416-BGA
Packages
PG-BGA-416
Max Clock Frequency
180.0 MHz
Sram (incl. Cache)
224.0 KByte
Can Nodes
4
A / D Input Lines (incl. Fadc)
48
Program Memory
2.0 MB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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5.3.9.2
V
T
Table 26
Parameter
Output delay from BFCLKO
active edge
RD and RD/WR active/inactive
after BFCLKO active edge
CSx output delay from
BFCLKO active edge
ADV active/inactive after
BFCLKO active edge
BAA active/inactive after
BFCLKO active edge
Data setup to BFCLKI rising
edge
Data hold from BFCLKI rising
edge
WAIT setup (low or high) to
BFCLKI rising edge
WAIT hold (low or high) from
BFCLKI rising edge
1) Not subject to production test, verified by design/characterization.
2) This is a default parameter which are applicable to all timings which are not explicitly covered by the other
3) An active edge can be rising or falling edge, depending on the settings of bits BFCON.EBSE / ECSE and clock
4) This parameter is valid for BUSCONx.EBSE = 1 and BUSAPx.EXTCLK = 00
Data Sheet
A
SS
parameters.
divider ratio.
Negative minimum values for these parameters mean that the last data read during a burst may be corrupted.
However, with clock feedback enabled, this value is oversampling not required for the LMB transaction and
will be discarded.
For BUSCONx.EBSE = 1 and other values of BUSAPx.EXTCLK, ADV and BAA will be delayed by 1 / 2 of the
LMB bus clock period
For BUSCONx. EBSE = 0 and BUSAPx.EXTCLK = 11
For BUSCONx. EBSE = 0 and other values of BUSAPx.EXTCLK add 1 LMB clock period.
= -40 °C to +125 °C;
= 0 V;
5)
5)
V
EBU Burst Mode Access Timing
2)
DD
EBU Burst Mode Read / Write Access Timing Parameters
= 1.5 V ± 5%;
5)
5)
T
3)
4)
4)
CPU
C
= 1 /
L
3)
= 35 pF;
f
CPU
V
DDEBU
.
Symbol
t
t
t
t
t
t
t
t
t
10
12
21
22
22a
23
24
25
26
= 2.5 V ± 5% and 3.3 V ± 5%, Class B pins;
CC
CC
CC -2.5
CC -2
SR 3
SR 0
SR 3
SR 0
CC -2.5
166
Min.
-2
-2
B
, add 2 LMB clock periods.
Values
Typ.
–
–
–
–
–
–
–
–
–
Max.
2
2
1.5
2
1.5
–
–
–
–
B
.
Electrical Parameters
Unit Note /
ns
ns
ns
ns
ns
ns
ns
ns
ns
V1.1, 2009-05
1)
Test Con
dition
–
–
–
–
–
–
–
–
–
TC1197
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