PIC18C658/CL Microchip Technology, PIC18C658/CL Datasheet - Page 122
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PIC18C658/CL
Manufacturer Part Number
PIC18C658/CL
Description
IC MCU OTP 16KX16 CAN 68-PLCC
Manufacturer
Microchip Technology
Series
PIC® 18Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16C770-ISO.pdf
(8 pages)
3.PIC18C658-IPT.pdf
(366 pages)
4.PIC18C658-IPT.pdf
(16 pages)
5.PIC18C658-IPT.pdf
(16 pages)
6.PIC18C658-IPT.pdf
(16 pages)
Specifications of PIC18C658/CL
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
52
Program Memory Size
32KB (16K x 16)
Program Memory Type
OTP
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
68-PLCC
For Use With
AC164308 - MODULE SKT FOR PM3 68PLCCDVA18PQ640 - DEVICE ADAPT PIC18C658 64-TQFP
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
Other names
Q1068347
- PIC16F616T-ISL PDF datasheet
- PIC16C770-ISO PDF datasheet #2
- PIC18C658-IPT PDF datasheet #3
- PIC18C658-IPT PDF datasheet #4
- PIC18C658-IPT PDF datasheet #5
- PIC18C658-IPT PDF datasheet #6
- Current page: 122 of 366
- Download datasheet (7Mb)
PIC18CXX8
12.2
The Timer2 module has an 8-bit period register PR2.
Timer2 increments from 00h until it matches PR2 and
then resets to 00h on the next increment cycle. PR2 is
a readable and writable register. The PR2 register is
initialized to FFh upon RESET.
FIGURE 12-1: TIMER2 BLOCK DIAGRAM
TABLE 12-1:
DS30475A-page 122
INTCON
PIR1
PIE1
IPR1
TMR2
T2CON
PR2
Legend: x = unknown, u = unchanged, - = unimplemented, read as ’0’. Shaded cells are not used by the Timer2 module.
Name
F
Note 1:
Timer2 Interrupt
OSC
Timer2 module’s register
Timer2 Period Register
GIE/GIEH
PSPIF
PSPIE
PSPIP
/4
Bit 7
—
TMR2 register output can be software selected by the SSP Module as a baud clock.
REGISTERS ASSOCIATED WITH TIMER2 AS A TIMER/COUNTER
PEIE/GIEL
TOUTPS3
Bit 6
ADIF
ADIE
ADIP
T2CKPS1:T2CKPS0
1:1, 1:4, 1:16
Prescaler
TOUTPS2
2
TMR0IE
Bit 5
RCIF
RCIE
RCIP
Advanced Information
TOUTPS1
INT0IE
Bit 4
TXIF
TXIE
TXIP
Comparator
TMR2
PR2
TOUTPS0
SSPIE
SSPIP
SSPIF
Bit 3
RBIE
RESET
EQ
12.3
The output of TMR2 (before the postscaler) is a clock
input to the Synchronous Serial Port module, which
optionally uses it to generate the shift clock.
TOUTPS3:TOUTPS0
1:1
TMR2ON
TMR0IF
CCP1IE
CCP1IP
CCP1IF
Postscaler
Bit 2
to
Output of TMR2
TMR2
4
1:16
Output
T2CKPS1
TMR2IF
TMR2IE
TMR2IP
INT0IF
(1)
Bit 1
2000 Microchip Technology Inc.
T2CKPS0
TMR1IF
TMR1IE
TMR1IP
Bit 0
RBIF
Sets Flag
bit TMR2IF
POR, BOR
0000 000x
0000 0000
0000 0000
0000 0000
0000 0000
-000 0000
1111 1111
Value on
0000 000u
0000 0000
0000 0000
0000 0000
0000 0000
-000 0000
1111 1111
Value on
RESETS
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