PIC18C658/CL Microchip Technology, PIC18C658/CL Datasheet - Page 256
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PIC18C658/CL
Manufacturer Part Number
PIC18C658/CL
Description
IC MCU OTP 16KX16 CAN 68-PLCC
Manufacturer
Microchip Technology
Series
PIC® 18Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16C770-ISO.pdf
(8 pages)
3.PIC18C658-IPT.pdf
(366 pages)
4.PIC18C658-IPT.pdf
(16 pages)
5.PIC18C658-IPT.pdf
(16 pages)
6.PIC18C658-IPT.pdf
(16 pages)
Specifications of PIC18C658/CL
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
52
Program Memory Size
32KB (16K x 16)
Program Memory Type
OTP
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
68-PLCC
For Use With
AC164308 - MODULE SKT FOR PM3 68PLCCDVA18PQ640 - DEVICE ADAPT PIC18C658 64-TQFP
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
Other names
Q1068347
- PIC16F616T-ISL PDF datasheet
- PIC16C770-ISO PDF datasheet #2
- PIC18C658-IPT PDF datasheet #3
- PIC18C658-IPT PDF datasheet #4
- PIC18C658-IPT PDF datasheet #5
- PIC18C658-IPT PDF datasheet #6
- Current page: 256 of 366
- Download datasheet (7Mb)
PIC18CXX8
22.2.2
The WDT has a postscaler that can extend the WDT
Reset period. The postscaler is selected at the time of
the device programming, by the value written to the
CONFIG2H configuration register.
FIGURE 22-1: WATCHDOG TIMER BLOCK DIAGRAM
TABLE 22-2:
DS30475A-page 256
CONFIG2H
RCON
WDTCON
Legend: Shaded cells are not used by the Watchdog Timer.
Name
Note: WDPS2:WDPS0 are bits in a configuration register.
WDT POSTSCALER
Configuration bit
WDTEN
SUMMARY OF WATCHDOG TIMER REGISTERS
IPEN
Bit 7
—
—
WDT Timer
LWRT
Bit 6
—
—
SWDTEN bit
Advanced Information
Bit 5
—
—
—
Bit 4
—
RI
—
WDTPS2
8 - to - 1 MUX
Postscaler
Bit 3
Time-out
TO
—
WDT
8
WDTPS2
Bit 2
PD
—
2000 Microchip Technology Inc.
WDTPS2:WDTPS0
WDTPS0
Bit 1
POR
—
SWDTEN
WDTEN
Bit 0
BOR
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