PIC18C658/CL Microchip Technology, PIC18C658/CL Datasheet - Page 294
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PIC18C658/CL
Manufacturer Part Number
PIC18C658/CL
Description
IC MCU OTP 16KX16 CAN 68-PLCC
Manufacturer
Microchip Technology
Series
PIC® 18Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16C770-ISO.pdf
(8 pages)
3.PIC18C658-IPT.pdf
(366 pages)
4.PIC18C658-IPT.pdf
(16 pages)
5.PIC18C658-IPT.pdf
(16 pages)
6.PIC18C658-IPT.pdf
(16 pages)
Specifications of PIC18C658/CL
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
52
Program Memory Size
32KB (16K x 16)
Program Memory Type
OTP
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
68-PLCC
For Use With
AC164308 - MODULE SKT FOR PM3 68PLCCDVA18PQ640 - DEVICE ADAPT PIC18C658 64-TQFP
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Eeprom Size
-
Other names
Q1068347
- PIC16F616T-ISL PDF datasheet
- PIC16C770-ISO PDF datasheet #2
- PIC18C658-IPT PDF datasheet #3
- PIC18C658-IPT PDF datasheet #4
- PIC18C658-IPT PDF datasheet #5
- PIC18C658-IPT PDF datasheet #6
- Current page: 294 of 366
- Download datasheet (7Mb)
PIC18CXX8
RLNCF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example:
DS30475A-page 294
Before Instruction
After Instruction
Decode
REG
N
Z
REG
N
Z
Q1
=
=
=
=
=
=
register ’f’
Rotate Left f (no carry)
[ label ] RLNCF
0
d
a
(f<n>)
(f<7>)
N,Z
The contents of register ’f’ are
rotated one bit to the left. If ’d’ is 0
the result is placed in WREG. If ’d’
is 1, the result is stored back in reg-
ister 'f' (default). If ’a’ is 0, the
Access Bank will be selected, over-
riding the BSR value. If ’a’ is 1, the
Bank will be selected as per the
BSR value.
1
1
RLNCF
Read
Q2
0100
1010 1011
?
?
0101 0111
0
0
f
[0,1]
[0,1]
255
dest<n+1>,
dest<0>
01da
Process
Data
Q3
register f
REG
f [ ,d [,a] ]
ffff
Advanced Information
destination
Write to
Q4
ffff
RRCF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example:
Before Instruction
After Instruction
Decode
REG
C
N
Z
REG
WREG
C
N
Z
Q1
=
=
=
=
=
=
=
=
=
register ’f’
Rotate Right f through Carry
[ label ]
0
d
a
(f<n>)
(f<0>)
(C)
C,N,Z
The contents of register 'f' are
rotated one bit to the right through
the Carry Flag. If 'd' is 0, the result
is placed in WREG. If 'd' is 1, the
result is placed back in register 'f'
(default). If ’a’ is 0, the Access
Bank will be selected, overriding
the BSR value. If ’a’ is 1, the Bank
will be selected as per the BSR
value.
1
1
RRCF
Read
0011
Q2
1110 0110
0
?
?
1110 0110
0111 0011
0
0
0
f
[0,1]
[0,1]
C
dest<7>
2000 Microchip Technology Inc.
255
dest<n-1>,
C,
RRCF f [ ,d [,a] ]
00da
Process
Data
REG, W
register f
Q3
ffff
destination
Write to
Q4
ffff
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