ATMEGA88-20PU Atmel, ATMEGA88-20PU Datasheet - Page 220

IC AVR MCU 8K 20MHZ 5V 28DIP

ATMEGA88-20PU

Manufacturer Part Number
ATMEGA88-20PU
Description
IC AVR MCU 8K 20MHZ 5V 28DIP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA88-20PU

Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Cpu Family
ATmega
Device Core
AVR
Device Core Size
8b
Frequency (max)
20MHz
Interface Type
SPI/TWI/USART
Total Internal Ram Size
1KB
# I/os (max)
23
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
On-chip Adc
6-chx10-bit
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Through Hole
Pin Count
28
Package Type
PDIP
Processor Series
ATMEGA8x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
23
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAVRTS2080A, ATASTK512-EK1-IND
Minimum Operating Temperature
- 40 C
Package
28PDIP
Family Name
ATmega
Maximum Speed
20 MHz
For Use With
ATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
220
1
2
3
4
5
6
7
Assembly Code Example
ATmega48/88/168
ldi
(1<<TWINT)|(1<<TWSTA)|
out
wait1:
in
sbrs r16,TWINT
rjmp wait1
in
andi r16, 0xF8
cpi
brne ERROR
ldi
out
ldi
(1<<TWEN)
out
wait2:
in
sbrs r16,TWINT
rjmp wait2
in
andi r16, 0xF8
cpi
brne ERROR
ldi
out
ldi
(1<<TWEN)
out
wait3:
in
sbrs r16,TWINT
rjmp wait3
in
andi r16, 0xF8
cpi
brne ERROR
ldi
(1<<TWINT)|(1<<TWEN)|
out
r16,
(1<<TWEN)
TWCR, r16
r16,TWCR
r16,TWSR
r16, START
r16, SLA_W
TWDR, r16
r16, (1<<TWINT) |
TWCR, r16
r16,TWCR
r16,TWSR
r16, MT_SLA_ACK
r16, DATA
TWDR, r16
r16, (1<<TWINT) |
TWCR, r16
r16,TWCR
r16,TWSR
r16, MT_DATA_ACK
r16,
(1<<TWSTO)
TWCR, r16
C Example
TWCR = (1<<TWINT)|(1<<TWSTA)|
while (!(TWCR & (1<<TWINT)))
if ((TWSR & 0xF8) != START)
TWDR = SLA_W;
TWCR = (1<<TWINT) |
(1<<TWEN);
while (!(TWCR & (1<<TWINT)))
if ((TWSR & 0xF8) !=
MT_SLA_ACK)
TWDR = DATA;
TWCR = (1<<TWINT) |
(1<<TWEN);
while (!(TWCR & (1<<TWINT)))
if ((TWSR & 0xF8) !=
MT_DATA_ACK)
TWCR = (1<<TWINT)|(1<<TWEN)|
(1<<TWEN)
(1<<TWSTO);
;
ERROR();
;
ERROR();
;
ERROR();
Comments
Send START condition
Wait for TWINT Flag set. This
indicates that the START
condition has been transmitted
Check value of TWI Status
Register. Mask prescaler bits. If
status different from START go to
ERROR
Load SLA_W into TWDR
Register. Clear TWINT bit in
TWCR to start transmission of
address
Wait for TWINT Flag set. This
indicates that the SLA+W has
been transmitted, and
ACK/NACK has been received.
Check value of TWI Status
Register. Mask prescaler bits. If
status different from
MT_SLA_ACK go to ERROR
Load DATA into TWDR Register.
Clear TWINT bit in TWCR to
start transmission of data
Wait for TWINT Flag set. This
indicates that the DATA has been
transmitted, and ACK/NACK has
been received.
Check value of TWI Status
Register. Mask prescaler bits. If
status different from
MT_DATA_ACK go to ERROR
Transmit STOP condition
2545S–AVR–07/10

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