AT89C51SND1C-ROTUL Atmel, AT89C51SND1C-ROTUL Datasheet - Page 150

IC 8051 MCU FLASH 64K MP3 80TQFP

AT89C51SND1C-ROTUL

Manufacturer Part Number
AT89C51SND1C-ROTUL
Description
IC 8051 MCU FLASH 64K MP3 80TQFP
Manufacturer
Atmel
Series
89Cr
Datasheet

Specifications of AT89C51SND1C-ROTUL

Core Processor
8051
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, IDE/ATAPI, MMC, SPI, UART/USART, USB
Peripherals
Audio, I²S, MP3, PCM, POR, WDT
Number Of I /o
44
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.3 V
Data Converters
A/D 2x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP, 80-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT89C51SND1C-ROTUL
Manufacturer:
Atmel
Quantity:
10 000
Figure 19-5. Data Transmission Format (CPHA = 0)
Figure 19-6. Data Transmission Format (CPHA = 1)
19.1.5
150
AT8xC51SND1C
SS Management
MOSI (From Master)
MOSI (from master)
SCK Cycle Number
MISO (From Slave)
SCK cycle number
MISO (from slave)
SCK (CPOL = 0)
SCK (CPOL = 1)
SCK (CPOL = 0)
SCK (CPOL = 1)
SPEN (Internal)
SPEN (internal)
Capture point
Capture point
SS (to slave)
SS (to slave)
For simplicity, Figure 19-5 and Figure 19-6 depict the SPI waveforms in idealized form and do
not provide precise timing information. For timing parameters refer to the Section “AC
Characteristics”.
Note:
Figure 19-5 shows an SPI transmission with CPHA = 0, where the first SCK edge is the MSB
capture point. Therefore the slave starts to output its MSB as soon as it is selected: SS asserted
to low level. SS must then be deasserted between each Byte transmission (see Figure 19-7).
SPDAT must be loaded with a data before SS is asserted again.
Figure 19-6 shows an SPI transmission with CPHA = 1, where the first SCK edge is used by the
slave as a start of transmission signal. Therefore, SS may remain asserted between each Byte
transmission (see Figure 19-7).
1. When the peripheral is disabled (SPEN = 0), default SCK line is high level.
MSB
MSB
MSB
MSB
1
1
bit 6
bit 6
bit 6
bit 6
2
2
bit 5
bit 5
bit 5
bit 5
3
3
bit 4
bit 4
bit 4
bit 4
4
4
bit 3
bit 3
bit 3
bit 3
5
5
bit 2
bit 2
bit 2
bit 2
6
6
bit 1
bit 1
bit 1
bit 1
7
7
LSB
LSB
LSB
8
8
LSB
4109L–8051–02/08

Related parts for AT89C51SND1C-ROTUL