AT89C51SND1C-ROTUL Atmel, AT89C51SND1C-ROTUL Datasheet - Page 45
![IC 8051 MCU FLASH 64K MP3 80TQFP](/photos/12/13/121358/313-80-tqfp_sml.jpg)
AT89C51SND1C-ROTUL
Manufacturer Part Number
AT89C51SND1C-ROTUL
Description
IC 8051 MCU FLASH 64K MP3 80TQFP
Manufacturer
Atmel
Series
89Cr
Datasheet
1.AT80C51SND1C-ROTIL.pdf
(213 pages)
Specifications of AT89C51SND1C-ROTUL
Core Processor
8051
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, IDE/ATAPI, MMC, SPI, UART/USART, USB
Peripherals
Audio, I²S, MP3, PCM, POR, WDT
Number Of I /o
44
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.3 V
Data Converters
A/D 2x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP, 80-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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4109L–8051–02/08
Reset Value = X000 0000b
Table 55. IPH1 Register
IPH1 (S:B3h) – Interrupt Priority High Register 1
Reset Value = 0000 0000b
Number
Number
Bit
Bit
7
6
5
4
3
2
1
0
7
7
6
5
4
3
2
1
0
-
Mnemonic Description
Mnemonic Description
IPHMMC
IPHAUD
IPHUSB
IPHADC
IPHMP3
IPHUSB
IPHSPI
IPHI2C
IPHX1
IPHX0
IPHKB
IPHT1
IPHT0
IPHS
Bit
Bit
6
-
-
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Audio Interface Interrupt Priority Level MSB
Refer to Table 50 for priority level description.
MP3 Decoder Interrupt Priority Level MSB
Refer to Table 50 for priority level description.
Serial Port Interrupt Priority Level MSB
Refer to Table 50 for priority level description.
Timer 1 Interrupt Priority Level MSB
Refer to Table 50 for priority level description.
External Interrupt 1 Priority Level MSB
Refer to Table 50 for priority level description.
Timer 0 Interrupt Priority Level MSB
Refer to Table 50 for priority level description.
External Interrupt 0 Priority Level MSB
Refer to Table 50 for priority level description.
Reserved
The value read from this bit is always 0. Do not set this bit.
USB Interrupt Priority Level MSB
Refer to Table 50 for priority level description.
Reserved
The value read from this bit is always 0. Do not set this bit.
Keyboard Interrupt Priority Level MSB
Refer to Table 50 for priority level description.
A to D Converter Interrupt Priority Level MSB
Refer to Table 50 for priority level description.
SPI Interrupt Priority Level MSB
Refer to Table 50 for priority level description.
Two Wire Controller Interrupt Priority Level MSB
Refer to Table 50 for priority level description.
MMC Interrupt Priority Level MSB
Refer to Table 50 for priority level description.
5
-
IPHKB
4
IPHADC
3
AT8xC51SND1C
IPHSPI
2
IPHI2C
1
IPHMMC
0
45
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