AT89C51SND1C-ROTUL Atmel, AT89C51SND1C-ROTUL Datasheet - Page 81
AT89C51SND1C-ROTUL
Manufacturer Part Number
AT89C51SND1C-ROTUL
Description
IC 8051 MCU FLASH 64K MP3 80TQFP
Manufacturer
Atmel
Series
89Cr
Datasheet
1.AT80C51SND1C-ROTIL.pdf
(213 pages)
Specifications of AT89C51SND1C-ROTUL
Core Processor
8051
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, IDE/ATAPI, MMC, SPI, UART/USART, USB
Peripherals
Audio, I²S, MP3, PCM, POR, WDT
Number Of I /o
44
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.3 V
Data Converters
A/D 2x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP, 80-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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15. Universal Serial Bus
15.0.1
15.0.2
15.1
4109L–8051–02/08
Description
USB Mass Storage Class Bulk-Only Transport
USB Device Firmware Upgrade (DFU)
The AT8xC51SND1C implements a USB device controller supporting full speed data transfer. In
addition to the default control endpoint 0, it provides 2 other endpoints, which can be configured
in control, bulk, interrupt or isochronous modes:
•
•
This allows the firmware to be developed conforming to most USB device classes, for example:
•
•
•
Within the Bulk-only framework, the Control endpoint is only used to transport class-specific and
standard USB requests for device set-up and configuration. One Bulk-out endpoint is used to
transport commands and data from the host to the device. One Bulk in endpoint is used to trans-
port status and data from the device to the host.
The following AT8xC51SND1C configuration adheres to those requirements:
•
•
•
The USB Device Firmware Update (DFU) protocol can be used to upgrade the on-chip Flash
memory of the AT89C51SND1C. This allows installing product enhancements and patches to
devices that are already in the field. 2 different configurations and descriptor sets are used to
support DFU functions. The Run-Time configuration co-exist with the usual functions of the
device, which is USB Mass Storage for AT89C51SND1C. It is used to initiate DFU from the nor-
mal operating mode. The DFU configuration is used to perform the firmware update after device
re-configuration and USB reset. It excludes any other function. Only the default control pipe
(endpoint 0) is used to support DFU services in both configurations.
The only possible value for the MaxPacketSize in the DFU configuration is 32 Bytes, which is the
size of the FIFO implemented for endpoint 0.
The USB device controller provides the hardware that the AT8xC51SND1C needs to interface a
USB link to a data flow stored in a double port memory.
It requires a 48 MHz reference clock provided by the clock controller as detailed in Section
"Clock Controller", page 82. This clock is used to generate a 12 MHz Full Speed bit clock from
the received USB differential data flow and to transmit data according to full speed USB device
tolerance. Clock recovery is done by a Digital Phase Locked Loop (DPLL) block.
The Serial Interface Engine (SIE) block performs NRZI encoding and decoding, bit stuffing, CRC
generation and checking, and the serial-parallel data conversion.
The Universal Function Interface (UFI) controls the interface between the data flow and the Dual
Port RAM, but also the interface with the C51 core itself.
USB Mass Storage Class Bulk-only Transport, Revision 1.0 - September 31, 1999
USB Human Interface Device Class, Version 1.1 - April 7, 1999
USB Device Firmware Upgrade Class, Revision 1.0 - May 13, 1999
Endpoint 0: 32 Bytes, Control In-Out
Endpoint 1: 64 Bytes, Bulk-in
Endpoint 2: 64 Bytes, Bulk-out
Endpoint 0: 32-Byte FIFO, default control endpoint
Endpoint 1, 2: 64-Byte Ping-pong FIFO,
AT8xC51SND1C
81
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