AT89C51SND1C-ROTUL Atmel, AT89C51SND1C-ROTUL Datasheet - Page 74

IC 8051 MCU FLASH 64K MP3 80TQFP

AT89C51SND1C-ROTUL

Manufacturer Part Number
AT89C51SND1C-ROTUL
Description
IC 8051 MCU FLASH 64K MP3 80TQFP
Manufacturer
Atmel
Series
89Cr
Datasheet

Specifications of AT89C51SND1C-ROTUL

Core Processor
8051
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, IDE/ATAPI, MMC, SPI, UART/USART, USB
Peripherals
Audio, I²S, MP3, PCM, POR, WDT
Number Of I /o
44
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.3 V
Data Converters
A/D 2x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP, 80-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT89C51SND1C-ROTUL
Manufacturer:
Atmel
Quantity:
10 000
14. Audio Output Interface
14.1
Figure 14-1. Audio Interface Block Diagram
14.2
74
Description
Clock Generator
MP3 Decoder
AT8xC51SND1C
Request To
Audio Data
Audio Data
From MP3
From C51
Decoder
CLOCK
Sample
AUD
AUDCON1.0
16
AUDEN
8
The AT8xC51SND1C implement an audio output interface allowing the audio bitstream to be
output in various formats. It is compatible with right and left justification PCM and I
and thanks to the on-chip PLL (see Section “Clock Controller”, page 13) allows connection of
almost all of the commercial audio DAC families available on the market.
The audio bitstream can be from 2 different types:
The C51 core interfaces to the audio interface through five special function registers: AUDCON0
and AUDCON1, the Audio Control registers (see Table 85 and Table 86); AUDSTA, the Audio
Status register (see Table 87); AUDDAT, the Audio Data register (see Table 88); and AUDCLK,
the Audio Clock Divider register (see Table 89).
Figure 14-1 shows the audio interface block diagram, blocks are detailed in the following
sections.
The audio interface clock is generated by division of the PLL clock. The division factor is given
by AUCD4:0 bits in CLKAUD register. Figure 14-2 shows the audio interface clock generator
The MP3 decoded bitstream coming from the MP3 decoder for playing songs.
The audio bitstream coming from the MCU for outputting voice or sounds.
MP3 Buffer
Audio Buffer
AUDCON1.2:1
AUDDAT
Data Ready
DUP1:0
AUDCON1.6
DRQEN
AUDCON0.0
HLR
Clock Generator
16
16
AUBUSY
AUDSTA.7
AUDSTA.6
AUDSTA.5
SREQ
UDRN
AUDCON0.1
AUDCON1.7
DSIZ
SRC
0
1
Data Converter
AUDCON0.7:3
JUST4:0
AUDCON0.2
POL
0
1
SCLK
DCLK
DSEL
DOUT
4109L–8051–02/08
2
S formats

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