Z8F6422AR020SC2104 Zilog, Z8F6422AR020SC2104 Datasheet - Page 143

IC ENCORE MCU FLASH 64K 64LQFP

Z8F6422AR020SC2104

Manufacturer Part Number
Z8F6422AR020SC2104
Description
IC ENCORE MCU FLASH 64K 64LQFP
Manufacturer
Zilog
Series
Encore!® XP®r
Datasheets

Specifications of Z8F6422AR020SC2104

Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
46
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
64-LQFP
For Use With
269-4678 - KIT DEV FOR Z8F642 MCU 44 PIN269-4677 - KIT DEV FOR Z8F642 MCU 28PIN269-4540 - KIT DEV FOR Z8 ENCORE 16K TO 64K
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
269-3641

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
Z8F6422AR020SC2104
Manufacturer:
Zilog
Quantity:
10 000
PS019921-0308
Input Sample Time
(CLKPOL = 0)
(CLKPOL = 1)
Transfer Format PHASE Equals Zero
Figure 24
The two SCK waveforms show polarity with CLKPOL reset to 0 and with CLKPOL set to
one. The diagram may be interpreted as either a Master or Slave timing diagram because
the SCK Master-In/Slave-Out (MISO) and Master-Out/Slave-In (MOSI) pins are directly
connected between the Master and the Slave.
Transfer Format PHASE Equals One
Figure 25
one. Two waveforms are depicted for SCK, one for CLKPOL reset to 0 and another for
CLKPOL set to 1.
MOSI
MISO
SCK
SCK
SS
displays the timing diagram for an SPI transfer in which PHASE is cleared to 0.
on page 130 displays the timing diagram for an SPI transfer in which PHASE is
Bit7
Bit7
Figure 24. SPI Timing When PHASE is 0
Bit6
Bit6
Bit5
Bit5
Bit4
Bit4
Bit3
Bit3
Z8 Encore! XP
Bit2
Bit2
Bit1
Bit1
Product Specification
Serial Peripheral Interface
Bit0
Bit0
®
F64XX Series
129

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