Z8F6422AR020SC2104 Zilog, Z8F6422AR020SC2104 Datasheet - Page 51

• Manufacturer Part Number: Z8F6422AR020SC2104
• Description: IC ENCORE MCU FLASH 64K 64LQFP
• Manufacturer: Zilog
• Series: Encore!® XP®r

Specifications of Z8F6422AR020SC2104

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 46
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 64-LQFP
• For Use With: 269-4678 - KIT DEV FOR Z8F642 MCU 44 PIN269-4677 - KIT DEV FOR Z8F642 MCU 28PIN269-4540 - KIT DEV FOR Z8 ENCORE 16K TO 64K
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: 269-3641

DMA1 Control
DMA1CTL (FB8H - Read/Write)
DMA1 I/O Address
DMA1IO (FB9H - Read/Write)
PS019921-0308
D7 D6 D5 D4 D3 D2 D1 D0
D7 D6 D5 D4 D3 D2 D1 D0
Request Trigger Source Select
000 = Timer 0
001 = Timer 1
010 = Timer 2
011 = Timer 3
100 = UART0 Transmit Data register
101 = UART1 Transmit Data register
110 = I2C Transmit Data register
111 = Reserved
Word Select
0 = DMA transfers 1 byte per
request
1 = DMA transfers 2 bytes per
request
DMA1 Interrupt Enable
0 = DMA1 does not generate
interrupts
1 = DMA1 generates an interrupt
when
DMA1 Data Transfer Direction
0 = Register File to peripheral
registers
1 = Peripheral registers to Register
File
DMA1 Loop Enable
0 = DMA disables after End Address
1 = DMA reloads Start Address after
run
DMA1 Enable
0 = DMA1 is disabled
1 = DMA1 is enabled
DMA1 Peripheral Register Address
control
Low byte of on-chip peripheral
registers on Register File page FH
End Address data is transferred
End Address and continues to
is empty
is empty
is empty
DMA1 Address High Nibble
DMA1H (FBAH - Read/Write)
DMA1 Start/Current Address Low Byte
DMA1START (FBBH - Read/Write)
DMA1 End Address Low Byte
DMA1END (FBCH - Read/Write)
DMA_ADC Address
DMAA_ADDR (FBDH - Read/Write)
D7 D6 D5 D4 D3 D2 D1 D0
D7 D6 D5 D4 D3 D2 D1 D0
D7 D6 D5 D4 D3 D2 D1 D0
D7 D6 D5 D4 D3 D2 D1 D0
Z8 Encore! XP
DMA1 Start Address [11:8]
DMA1 End Address [11:8]
DMA1 Start Address [7:0]
DMA1 End Address [7:0]
Reserved
DMA_ADC Address
Product Specification
Control Register Summary
®
F64XX Series
37