C8051F321R Silicon Laboratories Inc, C8051F321R Datasheet - Page 23
C8051F321R
Manufacturer Part Number
C8051F321R
Description
IC 8051 MCU 16K FLASH 28MLP
Manufacturer
Silicon Laboratories Inc
Series
C8051F32xr
Datasheet
1.C8051F320R.pdf
(256 pages)
Specifications of C8051F321R
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
21
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
336-1067-2
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1.3.
The Universal Serial Bus Controller (USB0) is a USB 2.0 compliant Full or Low Speed function with integrated
transceiver and endpoint FIFO RAM. A total of eight endpoint pipes are available: a bi-directional control endpoint
(Endpoint0) and three pairs of IN/OUT endpoints (Endpoints1-3 IN/OUT).
A 1k block of XRAM is used as dedicated USB FIFO space. This FIFO space is distributed among Endpoints0-3;
Endpoint1-3 FIFO slots can be configured as IN, OUT, or both IN and OUT (split mode). The maximum FIFO size is
512 bytes (Endpoint3).
USB0 can be operated as a Full or Low Speed function. On-chip 4x Clock Multiplier and clock recovery circuitry
allow both Full and Low Speed options to be implemented with the on-chip precision oscillator as the USB clock
source. An external oscillator source can also be used with the 4x Clock Multiplier to generate the USB clock. The
CPU clock source is independent of the USB clock.
The USB Transceiver is USB 2.0 compliant, and includes on-chip matching and pull-up resistors. The pull-up resis-
tors can be enabled/disabled in software, and will appear on the D+ or D- pin according to the software-selected
speed setting (Full or Low Speed).
1.4.
C8051F320/1 devices include a 5 V-to-3 V voltage regulator (REG0). When enabled, the REG0 output appears on
the VDD pin and can be used to power external devices. REG0 can be enabled/disabled by software.
D+
D-
Universal Serial Bus Controller
Voltage Regulator
VDD
Transceiver
Figure 1.6. USB Controller Block Diagram
Transfer
Control
Data
Serial Interface Engine (SIE)
IN
Endpoint0
Endpoint1
IN/OUT
IN
USB FIFOs
Endpoint2
(1k RAM)
Rev. 1.1
IN
Endpoint3
OUT
OUT
OUT
Status, and
Registers
Interrupt
Control,
USB
C8051F320/1
CIP-51 Core
23
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