C8051F321 Silicon Laboratories Inc, C8051F321 Datasheet - Page 130

• Manufacturer Part Number: C8051F321
• Description: IC 8051 MCU 16K FLASH 28MLP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F32xr

Specifications of C8051F321

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 21
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 2.25K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

C8051F320/1
Registers XBR0 and XBR1 are used to assign the digital I/O resources to the physical I/O Port pins. Note that when
the SMBus is selected, the Crossbar assigns both pins associated with the SMBus (SDA and SCL); when the UART is
selected, the Crossbar assigns both pins associated with the UART (TX and RX). UART0 pin assignments are fixed
for bootloading purposes: UART TX0 is always assigned to P0.4; UART RX0 is always assigned to P0.5. Standard
Port I/Os appear contiguously after the prioritized functions have been assigned.
Important Note: The SPI can be operated in either 3-wire or 4-wire modes, depending on the state of the NSSMD1-
NSSMD0 bits in register SPI0CN. According to the SPI mode, the NSS signal may or may not be routed to a Port pin.
130
SF Signals
PIN I/O
TX0
RX0
SCK
MISO
MOSI
NSS*
SDA
SCL
CP0
CP0A
CP1
CP1A
SYSCLK
CEX0
CEX1
CEX2
CEX3
CEX4
ECI
T0
T1
SF Signals
Port pin potentially available to peripheral
Special Function Signals are not assigned by the Crossbar. When these signals are enabled, the Crossbar must
be manually configured to skip their corresponding port pins.
0
0
Figure 14.4. Crossbar Priority Decoder with Crystal Pins Skipped
1
0
2
1
P0SKIP[0:7]
3
1
P0
4
0
5
0
6
0
7
0
0
0
*NSS is only pinned out in 4-wire SPI mode
1
0
Rev. 1.1
2
0
P1SKIP[0:7]
3
0
P1
4
0
5
0
6
0
7
0
0
0
P2SKIP[0:3]
1
0
2
0
3
0
P2
4
5
6
7