C8051F321 Silicon Laboratories Inc, C8051F321 Datasheet - Page 5
C8051F321
Manufacturer Part Number
C8051F321
Description
IC 8051 MCU 16K FLASH 28MLP
Manufacturer
Silicon Laboratories Inc
Series
C8051F32xr
Datasheet
1.C8051F320R.pdf
(256 pages)
Specifications of C8051F321
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
21
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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Company
Part Number
Manufacturer
Quantity
Price
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Part Number:
C8051F321
Manufacturer:
SILICON
Quantity:
249
Part Number:
C8051F321
Manufacturer:
SILICON LABS/芯科
Quantity:
20 000
Company:
Part Number:
C8051F321-GM
Manufacturer:
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Manufacturer:
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Quantity:
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Part Number:
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Quantity:
20 000
15. UNIVERSAL SERIAL BUS CONTROLLER (USB0) ....................................................143
16. SMBUS..................................................................................................................................175
17. UART0 ..................................................................................................................................193
14.2.Port I/O Initialization.....................................................................................................131
14.3.General Purpose Port I/O...............................................................................................134
15.1.Endpoint Addressing .....................................................................................................144
15.2.USB Transceiver ...........................................................................................................144
15.3. USB Register Access.....................................................................................................146
15.4.USB Clock Configuration .............................................................................................150
15.5. FIFO Management.........................................................................................................151
15.6. Function Addressing......................................................................................................153
15.7. Function Configuration and Control .............................................................................154
15.8.Interrupts .......................................................................................................................157
15.9.The Serial Interface Engine ...........................................................................................161
15.10.Endpoint0.....................................................................................................................161
15.11.Configuring Endpoints1-3 ...........................................................................................166
15.12.Controlling Endpoints1-3 IN .......................................................................................166
15.13.Controlling Endpoints1-3 OUT ...................................................................................170
16.1. Supporting Documents ..................................................................................................176
16.2. SMBus Configuration....................................................................................................176
16.3. SMBus Operation ..........................................................................................................177
16.4. Using the SMBus...........................................................................................................179
16.5. SMBus Transfer Modes.................................................................................................187
16.6. SMBus Status Decoding................................................................................................191
15.5.1. FIFO Split Mode ..................................................................................................151
15.5.2. FIFO Double Buffering .......................................................................................151
15.5.3. FIFO Access ........................................................................................................152
15.10.1.Endpoint0 SETUP Transactions .........................................................................162
15.10.2.Endpoint0 IN Transactions .................................................................................162
15.10.3.Endpoint0 OUT Transactions .............................................................................163
15.12.1.Endpoints1-3 IN Interrupt or Bulk Mode ...........................................................166
15.12.2.Endpoints1-3 IN Isochronous Mode...................................................................167
15.13.1.Endpoints1-3 OUT Interrupt or Bulk Mode .......................................................170
15.13.2.Endpoints1-3 OUT Isochronous Mode...............................................................170
16.3.1. Arbitration............................................................................................................177
16.3.2. Clock Low Extension...........................................................................................178
16.3.3. SCL Low Timeout ...............................................................................................178
16.3.4. SCL High (SMBus Free) Timeout.......................................................................178
16.4.1. SMBus Configuration Register............................................................................180
16.4.2. SMB0CN Control Register ..................................................................................183
16.4.3. Data Register........................................................................................................186
16.5.1. Master Transmitter Mode ....................................................................................187
16.5.2. Master Receiver Mode.........................................................................................188
16.5.3. Slave Receiver Mode ...........................................................................................189
16.5.4. Slave Transmitter Mode.......................................................................................190
Rev. 1.1
C8051F320/1
5