C8051F321 Silicon Laboratories Inc, C8051F321 Datasheet - Page 27
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C8051F321
Manufacturer Part Number
C8051F321
Description
IC 8051 MCU 16K FLASH 28MLP
Manufacturer
Silicon Laboratories Inc
Series
C8051F32xr
Datasheet
1.C8051F320R.pdf
(256 pages)
Specifications of C8051F321
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
21
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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1.9.
The C8051F320/1 devices include an on-chip 10-bit SAR ADC with a 17-channel differential input multiplexer. With
a maximum throughput of 200 ksps, the ADC offers true 10-bit linearity with an INL of ±1LSB. The ADC system
includes a configurable analog multiplexer that selects both positive and negative ADC inputs. Ports1-3 are available
as ADC inputs; additionally, the on-chip Temperature Sensor output and the power supply voltage (VDD) are avail-
able as ADC inputs. User firmware may shut down the ADC to save power.
Conversions can be started in six ways: a software command, an overflow of Timer 0, 1, 2, or 3, or an external con-
vert start signal. This flexibility allows the start of conversion to be triggered by software events, a periodic signal
(timer overflows), or external HW signals. Conversion completions are indicated by a status bit and an interrupt (if
enabled). The resulting 10-bit data word is latched into the ADC data SFRs upon completion of a conversion.
Window compare registers for the ADC data can be configured to interrupt the controller when ADC data is either
within or outside of a specified range. The ADC can monitor a key voltage continuously in background mode, but not
interrupt the controller unless the converted data is within/outside the specified range.
available on
available on
C8051F320
C8051F320
P2.4-2.7
P2.4-2.7
10-Bit Analog to Digital Converter
Sensor
Temp
Analog Multiplexer
VREF
GND
P1.0
P1.7
P2.0
P2.7
P3.0
VDD
P1.0
P1.7
P2.0
P2.7
P3.0
19-to-1
19-to-1
AMUX
AMUX
Figure 1.10. 10-Bit ADC Block Diagram
Configuration, Control, and Data Registers
Rev. 1.1
(+)
(-)
ADC
10-Bit
SAR
End of
Conversion
Interrupt
Conversion
Start
C8051F320/1
Window Compare
16
Logic
000
001
010
011
100
101
ADC Data
AD0BUSY (W)
Timer 0 Overflow
Timer 2 Overflow
Timer 1 Overflow
CNVSTR Input
Timer 3 Overflow
Registers
Window
Compare
Interrupt
27
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