R8A77850ADBGV Renesas Electronics America, R8A77850ADBGV Datasheet - Page 86

• Manufacturer Part Number: R8A77850ADBGV
• Description: IC SUPERH MPU ROMLESS 436-BGA
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7780r

Specifications of R8A77850ADBGV

• Core Processor: SH-4A
• Core Size: 32-Bit
• Speed: 600MHz
• Connectivity: Audio Codec, MMC, Serial Sound, SCI, SIO, SPI, SSI
• Peripherals: DMA, POR, WDT
• Number Of I /o: 108
• Program Memory Type: ROMless
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1 V ~ 1.2 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 436-BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

3. Instruction Set
Rev.1.00 Jan. 10, 2008 Page 54 of 1658
REJ09B0261-0100
Instruction
MOV.B
MOV.W
MOV.L
MOV.B
MOV.W
MOV.L
MOV.B
MOV.W
MOV.L
MOV.B
MOV.W
MOV.L
MOV.B
MOV.W
MOV.L
MOVA
MOVCO.L
MOVLI.L
MOVUA.L
MOVUA.L
@(disp*,Rm),R0
@(disp*,Rm),R0
@(disp*,Rm),Rn
Rm,@(R0,Rn)
Rm,@(R0,Rn)
Rm,@(R0,Rn)
@(R0,Rm),Rn
@(R0,Rm),Rn
@(R0,Rm),Rn
R0,@(disp*,GBR)
R0,@(disp*,GBR)
R0,@(disp*,GBR)
@(disp*,GBR),R0
@(disp*,GBR),R0
@(disp*,GBR),R0
@(disp*,PC),R0
R0,@Rn
@Rm,R0
@Rm,R0
@Rm+,R0
Operation
(disp + Rm) → sign
extension → R0
(disp × 2 + Rm) → sign
extension → R0
(disp × 4 + Rm) → Rn
Rm → (R0 + Rn)
Rm → (R0 + Rn)
Rm → (R0 + Rn)
(R0 + Rm) →
sign extension → Rn
(R0 + Rm) →
sign extension → Rn
(R0 + Rm) → Rn
R0 → (disp + GBR)
R0 → (disp × 2 + GBR)
R0 → (disp × 4 + GBR)
(disp + GBR) →
sign extension → R0
(disp × 2 + GBR) →
sign extension → R0
(disp × 4 + GBR) → R0
disp × 4 +
PC & H'FFFF FFFC
+ 4 → R0
LDST → T
If (T == 1) R0 → (Rn)
0 → LDST
1 → LDST
(Rm) → R0
When interrupt/exception
occurred 0 → LDST
(Rm) → R0
Load non-boundary
alignment data
(Rm) → R0, Rm + 4 →
Rm
Load non-boundary
alignment data
Instruction Code
10000100mmmmdddd
10000101mmmmdddd
0101nnnnmmmmdddd
0000nnnnmmmm0100
0000nnnnmmmm0101
0000nnnnmmmm0110
0000nnnnmmmm1100
0000nnnnmmmm1101
0000nnnnmmmm1110
11000000dddddddd
11000001dddddddd
11000010dddddddd
11000100dddddddd
11000101dddddddd
11000110dddddddd
11000111dddddddd
0000nnnn01110011
0000mmmm01100011
0100mmmm10101001
0100mmmm11101001
Privileged T Bit
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