AK4382AVT AKM Semiconductor Inc, AK4382AVT Datasheet - Page 13

• Manufacturer Part Number: AK4382AVT
• Description: IC DAC 24BIT DIFF 16TSSOP
• Manufacturer: AKM Semiconductor Inc

Specifications of AK4382AVT

• Number Of Bits: 24
• Data Interface: Serial
• Number Of Converters: 2
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power Dissipation (max): -
• Settling Time: -
• Other names: 974-1009-2; AK4382AVT

ASAHI KASEI
n Zero Detection
The AK4382A has channel-independent zeros detect function. When the input data at each channel is continuously zero s
for 8192 LRCK cycles, DZF pin of each channel goes to “H”. DZF pin of each channel immediately goes to “L” if input data
of each channel is not zero after going DZF “H”. If RSTN bit is “0”, DZF pins of both channels go to “ H”. DZF pin of both
channels go to “L” at 2~3/fs after RSTN bit returns to “ 1”. If DZFM bit is set to “1”, DZF pins of both channels go to “ H”
only when the input data at both channels are continuously zeros for 8192 LRCK cycles. Zero detect function can be
disabled by DZFE bit. In this case, DZF pins of both channels are always “L”. DZFB bit can invert the polarity of DZF pin.
n Soft Mute Operation
Soft mute operation is performed at digital domain. When the SMUTE bit goes to “1”, the output signal is attenuated by -
during ATT_DATA ATT transition time (Table 9) from the current ATT level. When the SMUTE bit is returned to “0”, the
mute is cancelled and the output attenuation gradually changes to the ATT le vel during ATT_DATA ATT transition time.
If the soft mute is cancelled before attenuating to -
returned to ATT level by the same cycle. The soft mute is effective for changing the signal source without stopping the
signal transmission.
Notes:
MS0071-E-02
(2) The analog output corresponding to the digital input has a group delay, GD.
(4) When the input data at each channel is continuously zeros for 8192 LRCK cycles, DZF pin of each channel goes to
(1) ATT_DATA ATT transition time (Table 9). For example, in Normal Speed Mode, this time is 1020LRCK cycles
(3) If the soft mute is cancelled before attenuating to - after starting the operation, the attenuation is discontinued and
“H”. DZF pin immediately goes to “L” if input data are not zero after going DZF “H”.
(1020/fs) at ATT_DATA=255.
returned to ATT level by the same cycle.
SMUTE bit
Attenuation
AOUT
DZF pin
ATT Level
-
Figure 5. Soft Mute and Zero Detection
(1)
8192/fs
after starting the operation, the attenuation is discontinued and
(4)
- 13 -
GD
(2)
(1)
GD
(3)
[AK4382A]
2002/12