AK4382AVT AKM Semiconductor Inc, AK4382AVT Datasheet - Page 14

• Manufacturer Part Number: AK4382AVT
• Description: IC DAC 24BIT DIFF 16TSSOP
• Manufacturer: AKM Semiconductor Inc

Specifications of AK4382AVT

• Number Of Bits: 24
• Data Interface: Serial
• Number Of Converters: 2
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-TSSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power Dissipation (max): -
• Settling Time: -
• Other names: 974-1009-2; AK4382AVT

ASAHI KASEI
n System Reset
The AK4382A should be reset once by bringing PDN= ”L” upon power-up. The AK4382A is powered up and the internal
timing starts clocking by LRCK “ ” after exiting reset and power down state by MCLK. The AK4382A is in the power-down
mode until MCLK and LRCK are input.
n Power-down
The AK4382A is placed in the power-down mode by bringing PDN pin “L” and the anlog outputs are floating (Hi-Z). Figure
6 shows an example of the system timing at the power-down and power-up.
Notes:
MS0071-E-02
(1) The analog output corresponding to digital input has the group delay (GD).
(2) Analog outputs are floating (Hi -Z) at the power-down mode.
(3) Click noise occurs at the edge of PDN signal. This noise is output even if “0” data is input.
(4) The external clocks (MCLK, BICK and LRCK) can be stopped in the power-down mode (PDN = “L”).
(5) Please mute the analog output externally if the click noise (3) influences system application.
(6) DZF pins are “L” in the power-down mode (PDN = “L”).
Internal
D/A In
D/A Out
Clock In
MCLK, LRCK, BICK
PDN
DZFL/DZFR
External
MUTE
(Digital)
(Analog)
The timing example is shown in this figure.
State
(5)
Normal Operation
Figure 6. Power-down/up Sequence Example
GD
(1)
(3)
(6)
(4)
- 14 -
Mute ON
Power-down
“0” data
Don’t care
(2)
(3)
Normal Operation
GD
(1)
[AK4382A]
2002/12