XR16M2550IL32-F Exar Corporation, XR16M2550IL32-F Datasheet - Page 14

• Manufacturer Part Number: XR16M2550IL32-F
• Description: IC UART FIFO 16B 1.8V DUAL 32QFN
• Manufacturer: Exar Corporation
• Type: Dual UART with 16-byte FIFOsr

Specifications of XR16M2550IL32-F

• Number Of Channels: 2, DUART
• Package / Case: 32-VFQFN Exposed Pad
• Features: *
• Fifo's: 16 Byte
• Voltage - Supply: 2.25 V ~ 3.6 V
• With Auto Flow Control: Yes
• With Irda Encoder/decoder: Yes
• With False Start Bit Detection: Yes
• With Modem Control: Yes
• With Cmos: Yes
• Mounting Type: Surface Mount
• Data Rate: 16 Mbps
• Supply Voltage (max): 3.63 V
• Supply Voltage (min): 1.62 V
• Supply Current: 0.5 mA to 2 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 45 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 1.62 V to 3.63 V
• No. Of Channels: 2
• Uart Features: Two Independent UART Channels, Device Identification & Revision
• Supply Voltage Range: 1.62V To 3.63V
• Operating Temperature Range: -40°C To +85°C
• Rohs Compliant: Yes
• Digital Ic Case Style: QFN
• No. Of Pins: 32
• Filter Terminals: SMD
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 1016-1285

XR16M2550
HIGH PERFORMANCE LOW VOLTAGE DUART WITH 16-BYTE FIFO
F
F
IGURE
IGURE
1 6 X o r 8 X o r 4 X C lo ck
Receive Data
16X or 8X or 4X Clock
Byte and Errors
16 bytes by 11-bit wide
8. R
9. R
( D L D [5 :4 ] )
a n d E rro rs
( DLD[5:4] )
D a ta B yte
R e ce ive
ECEIVER
ECEIVER
FIFO
O
O
PERATION IN NON
PERATION IN
Receive Data Shift
Register (RSR)
L S R b its
T a g s in
E rro r
4 :2
Data FIFO
Receive
FIFO
Receive
Data
R e ce ive D a ta S h ift
-FIFO M
R e g iste r (R S R )
AND
H o ld in g R e g iste r
R e ce ive D a ta
A
UTO
ODE
(R H R )
Validation
Data falls to
Data fills to
Data Bit
Trigger=8
FIFO
14
Example
4
RTS F
14
: - RX FIFO trigger level selected at 8 bytes
LOW
RTS# re-asserts when data falls below the flow
control trigger level to restart remote transmitter.
Enable by EFR bit-6=1, MCR bit-1.
RTS# de-asserts when data fills above the flow
control trigger level to suspend remote transmitter.
Enable by EFR bit-6=1, MCR bit-1.
RHR Interrupt (ISR bit-2) programmed for
(See Note Below)
desired FIFO trigger level.
FIFO is Enabled by FCR bit-0=1
C
V a lid a tio n
D a ta B it
ONTROL
M
R H R In te rru p t (IS R b it-2 )
ODE
Receive Data Characters
R e c e iv e D a ta C h a ra cte rs
R X F IF O 1
RXFIFO1
REV. 1.0.2