XR16M2550IL32-F Exar Corporation, XR16M2550IL32-F Datasheet - Page 30

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XR16M2550IL32-F

Manufacturer Part Number
XR16M2550IL32-F
Description
IC UART FIFO 16B 1.8V DUAL 32QFN
Manufacturer
Exar Corporation
Type
Dual UART with 16-byte FIFOsr
Datasheet

Specifications of XR16M2550IL32-F

Number Of Channels
2, DUART
Package / Case
32-VFQFN Exposed Pad
Features
*
Fifo's
16 Byte
Voltage - Supply
2.25 V ~ 3.6 V
With Auto Flow Control
Yes
With Irda Encoder/decoder
Yes
With False Start Bit Detection
Yes
With Modem Control
Yes
With Cmos
Yes
Mounting Type
Surface Mount
Data Rate
16 Mbps
Supply Voltage (max)
3.63 V
Supply Voltage (min)
1.62 V
Supply Current
0.5 mA to 2 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 45 C
Mounting Style
SMD/SMT
Operating Supply Voltage
1.62 V to 3.63 V
No. Of Channels
2
Uart Features
Two Independent UART Channels, Device Identification & Revision
Supply Voltage Range
1.62V To 3.63V
Operating Temperature Range
-40°C To +85°C
Rohs Compliant
Yes
Digital Ic Case Style
QFN
No. Of Pins
32
Filter Terminals
SMD
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
1016-1285

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
XR16M2550IL32-F
Manufacturer:
ADI
Quantity:
469
Part Number:
XR16M2550IL32-F
Manufacturer:
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Quantity:
20 000
XR16M2550
HIGH PERFORMANCE LOW VOLTAGE DUART WITH 16-BYTE FIFO
MCR[3]: OP2# Output / INT Output Enable
This bit enables or disables the operation of INT, interrupt output. If INT output is not used, OP2# can be used
as a general purpose output.
MCR[4]: Internal Loopback Enable
MCR[5]: Xon-Any Enable (requires EFR bit-4=1)
MCR[6]: Infrared Encoder/Decoder Enable (requires EFR bit-4=1)
MCR[7]: Clock Prescaler Select (requires EFR bit-4=1)
This register provides the status of data transfers between the UART and the host.
LSR[0]: Receive Data Ready Indicator
LSR[1]: Receiver Overrun Error Flag
LSR[2]: Receive Data Parity Error Tag
4.8
Logic 0 = INT (A-B) outputs disabled (three state mode) and OP2# output set HIGH(default).
Logic 1 = INT (A-B) outputs enabled (active mode) and OP2# output set LOW.
Logic 0 = Disable loopback mode (default).
Logic 1 = Enable local loopback mode, see loopback section and
Logic 0 = Disable Xon-Any function (default).
Logic 1 = Enable Xon-Any function. In this mode, any RX character received will resume transmit operation.
The RX character will be loaded into the RX FIFO, unless the RX character is an Xon or Xoff character and
the M2550 is programmed to use the Xon/Xoff flow control.
Logic 0 = Enable the standard modem receive and transmit input/output interface (default).
Logic 1 = Enable infrared IrDA receive and transmit inputs/outputs. The TX/RX output/input are routed to the
infrared encoder/decoder. The data input and output levels conform to the IrDA infrared interface
requirement. While in this mode, the infrared TX output will be idling LOW.
PAGE 18.
Logic 0 = Divide by one. The input clock from the crystal or external clock is fed directly to the Programmable
Baud Rate Generator without further modification, i.e., divide by one (default).
Logic 1 = Divide by four. The prescaler divides the input clock from the crystal or external clock by four and
feeds it to the Programmable Baud Rate Generator, hence, data rates become one forth.
Logic 0 = No data in receive holding register or FIFO (default).
Logic 1 = Data has been received and is saved in the receive holding register or FIFO.
Logic 0 = No overrun error (default).
Logic 1 = Overrun error. A data overrun error condition occurred in the receive shift register. This happens
when additional data arrives while the FIFO is full. In this case the previous data in the receive shift register
is overwritten. Note that under this condition the data byte in the receive shift register is not transferred into
the FIFO, therefore the data in the FIFO is not corrupted by the error.
Logic 0 = No parity error (default).
Logic 1 = Parity error. The receive character in RHR does not have correct parity information and is suspect.
This error is associated with the character available for reading in RHR.
Line Status Register (LSR) - Read Only
To change the polarity of the IrDA data at the Rx input, see MCR[2].
30
Figure
12.
SEE”INFRARED MODE” ON
REV. 1.0.2

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