XR16M2550IL32-F Exar Corporation, XR16M2550IL32-F Datasheet - Page 47

• Manufacturer Part Number: XR16M2550IL32-F
• Description: IC UART FIFO 16B 1.8V DUAL 32QFN
• Manufacturer: Exar Corporation
• Type: Dual UART with 16-byte FIFOsr

Specifications of XR16M2550IL32-F

• Number Of Channels: 2, DUART
• Package / Case: 32-VFQFN Exposed Pad
• Features: *
• Fifo's: 16 Byte
• Voltage - Supply: 2.25 V ~ 3.6 V
• With Auto Flow Control: Yes
• With Irda Encoder/decoder: Yes
• With False Start Bit Detection: Yes
• With Modem Control: Yes
• With Cmos: Yes
• Mounting Type: Surface Mount
• Data Rate: 16 Mbps
• Supply Voltage (max): 3.63 V
• Supply Voltage (min): 1.62 V
• Supply Current: 0.5 mA to 2 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 45 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 1.62 V to 3.63 V
• No. Of Channels: 2
• Uart Features: Two Independent UART Channels, Device Identification & Revision
• Supply Voltage Range: 1.62V To 3.63V
• Operating Temperature Range: -40°C To +85°C
• Rohs Compliant: Yes
• Digital Ic Case Style: QFN
• No. Of Pins: 32
• Filter Terminals: SMD
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 1016-1285

REV. 1.0.2
5.0 ELECTRICAL CHARACTERISTICS ..................................................................................................... 36
TABLE OF CONTENTS .....................................................................................................
A
T
DC E
AC E
P
P
R
YPICAL
BSOLUTE
ACKAGE
ACKAGE
4.5 FIFO CONTROL REGISTER (FCR) - WRITE-ONLY ........................................................................................ 26
4.6 LINE CONTROL REGISTER (LCR) - READ/WRITE ........................................................................................ 27
4.7 MODEM CONTROL REGISTER (MCR) OR GENERAL PURPOSE OUTPUTS CONTROL - READ/WRITE . 29
4.8 LINE STATUS REGISTER (LSR) - READ ONLY.............................................................................................. 30
4.9 MODEM STATUS REGISTER (MSR) - READ ONLY ....................................................................................... 31
4.10 SCRATCH PAD REGISTER (SPR) - READ/WRITE ....................................................................................... 32
4.11 BAUD RATE GENERATOR REGISTERS (DLL, DLM AND DLD) - READ/WRITE ....................................... 32
4.12 DEVICE IDENTIFICATION REGISTER (DVID) - READ ONLY....................................................................... 32
4.13 DEVICE REVISION REGISTER (DREV) - READ ONLY................................................................................. 33
4.14 ENHANCED FEATURE REGISTER (EFR) .................................................................................................... 33
EVISION
T
T
T
T
T
T
F
F
F
F
F
F
F
F
F
F
ABLE
ABLE
ABLE
ABLE
ABLE
ABLE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
IGURE
LECTRICAL
LECTRICAL
4.4.1 INTERRUPT GENERATION: ........................................................................................................................................ 25
4.4.2 INTERRUPT CLEARING: ............................................................................................................................................. 25
4.14.1 SOFTWARE FLOW CONTROL REGISTERS (XOFF1, XOFF2, XON1, XON2) - READ/WRITE .............................. 34
P
10: I
11: T
12: P
13: S
14: S
15: UART RESET CONDITIONS FOR CHANNEL A AND B ............................................................................................ 35
13. C
14. M
15. D
16. D
17. R
18. T
19. R
20. R
21. T
22. T
H
D
D
ACKAGE
M
IMENSIONS
IMENSIONS
ISTORY
NTERRUPT
AXIMUM
RANSMIT AND
ARITY SELECTION
AMPLING
OFTWARE
RANSMIT
RANSMIT
RANSMIT
LOCK
ATA
ATA
ECEIVE
ECEIVE
ECEIVE
ODEM
C
C
B
B
HARACTERISTICS
HARACTERISTICS
T
T
US
US
..................................................................................................................................... 45
I
IMING
NPUT
HERMAL
R
R
R
R
R
S
F
R
R
R
R
W
EADY
EADY
EADY
ATE
OURCE AND
LOW
ATINGS
EADY
EADY
EADY
EAD
(48
(32
RITE
R
/O
............................................................................................................................................................. 38
S
ECEIVE
UTPUT
& I
& I
& I
C
T
ELECT
PIN TQFP
PIN
T
& I
& I
& I
........................................................................................................................................................ 29
IMING
ONTROL
IMING
NTERRUPT
NTERRUPT
NTERRUPT
R
NTERRUPT
NTERRUPT
NTERRUPT
.................................................................................................................... 36
ESISTANCE
QFN - 5
FIFO T
T
P
............................................................................................................................................... 32
.............................................................................................................................................. 39
IMING
RIORITY
............................................................................................................................................ 39
F
............................................................................................................. 36
............................................................................................................. 37
UNCTIONS
HIGH PERFORMANCE LOW VOLTAGE DUART WITH 16-BYTE FIFO
- 7
T
T
T
RIGGER
F
T
T
T
IMING
IMING
IMING
OR
IMING
IMING
IMING
X
X
L
EVEL
C
5
D
7
HANNELS
ATA
[N
[FIFO M
[FIFO M
X
X
L
........................................................................................................................ 33
[N
[FIFO M
[FIFO M
EVEL
ON
1
0.9
..................................................................................................................... 26
ON
-FIFO M
mm
(M
-FIFO M
S
mm
ODE
ODE
ARGIN OF ERROR
A & B ................................................................................................. 38
ELECTION
) .................................................................................. 43
ODE
ODE
) ............................................................................... 44
, DMA D
, DMA E
II
ODE
, DMA M
, DMA M
ODE
]
FOR
]
............................................................................................ 27
FOR
NABLED
ISABLED
ODE
ODE
C
C
HANNELS
HANNELS
D
E
]
NABLED
]
ISABLED
: ± 15%).............................................. 36
FOR
FOR
C
A & B ......................................................... 40
C
A & B ....................................................... 40
HANNELS
]
HANNELS
]
FOR
FOR
C
C
HANNELS
HANNELS
A & B......................................... 41
A & B........................................ 41
A & B ............................ 42
A & B ........................... 42
XR16M2550
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