XR88C681CP/40-F Exar Corporation, XR88C681CP/40-F Datasheet - Page 4

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XR88C681CP/40-F

Manufacturer Part Number
XR88C681CP/40-F
Description
IC UART CMOS DUAL 40PDIP
Manufacturer
Exar Corporation
Type
CMOS Dual Channel UARTr
Datasheet

Specifications of XR88C681CP/40-F

Number Of Channels
2, DUART
Package / Case
40-DIP (0.600", 15.24mm)
Features
*
Fifo's
1 Byte, 3 Byte
Voltage - Supply
5V
With Parallel Port
Yes
With Cmos
Yes
Mounting Type
Through Hole
Data Rate
1 Mbps
Supply Voltage (max)
5.25 V
Supply Voltage (min)
4.75 V
Supply Current
15 mA
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
Through Hole
Operating Supply Voltage
5 V
Propagation Delay Time Ns
400 ns
No. Of Channels
2
Supply Voltage Range
4.75V To 5.25V
Operating Temperature Range
0°C To +70°C
Digital Ic Case Style
DIP
No. Of Pins
40
Filter Terminals
DIP
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
1016-1328-5

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
XR88C681CP/40-F
Manufacturer:
Linear
Quantity:
185
PIN DESCRIPTION
44 PLCC
Rev. 2.11
10
12
13
11
1
2
3
4
5
6
7
8
9
40 PDIP,
CDIP
10
11
1
2
3
4
5
6
7
8
9
28 PDIP
1
2
3
4
5
6
7
8
(RXCA - Z)
(TXCA - I)
Symbol
(-CTSB)
(-CTSA)
RXDB
TXDB
-WR
-RD
NC
IP3
IP1
IP0
NC
A0
A1
A2
A3
Type
O
I
I
I
I
I
I
I
I
I
I
4
Description
No Connection.
LSB of Address Input. This input, along with Address Inputs,
A1 - A3 are used to select certain registers within the DUART
device, during READ and WRITE operations with the CPU.
Input Port 3. General Purpose Input - When the DUART is
operating in the I-mode, this input can also be used as the
external clock input for the Channel A Transmitter (TXCA).
When the DUART is operating in the Z-Mode, this input can
be used as the external clock input for the Channel A Receiv-
er (RXCA).
Address Input.
Input Port 1. General Purpose Input - This input can also be
used as the Active Low, “Channel B Clear to Send” input.
(
Address Input.
MSB of Address Input. This input, along with Address In-
puts, A0 - A2 are used to select certain registers within the
DUART device, during READ and WRITE operations with the
CPU.
Input 0. General Purpose Input - This input can also be used
as the active-low, “Channel A Clear-to-Send” input. (-CTSA)
Write Strobe (Active-Low). A “low” on this input while -CS is
also “low” writes the contents of the Data Bus into the ad-
dressed register, within the DUART. The transfer occurs on
the rising edge of -WR.
Read Strobe (Active Low). A “low” on this input while
also “low” places the contents of the addressed DUART regis-
ter, on the data bus.
Receive Serial Data Input (Channel B). The least significant
bit of the character is received first. If external receiver clock,
RXCB, is specified, the data is sampled on the rising edge of
this clock.
No Connect.
Transmitter Serial Data Output (Channel B). The least sig-
nificant bit of the character is transmitted first. This output is
held in the high (marking state) when the transmitter is idle,
disabled, or when the channel is operating in the local LOOP-
BACK mode. If an external transmitter clock is specified,
TXCB, the transmitted data is shifted out of the TSR (Trans-
mitter Shift Register) on the falling the edge of this clock.
-
CTSB)
-
CS is

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