XR88C681CP/40-F Exar Corporation, XR88C681CP/40-F Datasheet - Page 56

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XR88C681CP/40-F

Manufacturer Part Number
XR88C681CP/40-F
Description
IC UART CMOS DUAL 40PDIP
Manufacturer
Exar Corporation
Type
CMOS Dual Channel UARTr
Datasheet

Specifications of XR88C681CP/40-F

Number Of Channels
2, DUART
Package / Case
40-DIP (0.600", 15.24mm)
Features
*
Fifo's
1 Byte, 3 Byte
Voltage - Supply
5V
With Parallel Port
Yes
With Cmos
Yes
Mounting Type
Through Hole
Data Rate
1 Mbps
Supply Voltage (max)
5.25 V
Supply Voltage (min)
4.75 V
Supply Current
15 mA
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
Through Hole
Operating Supply Voltage
5 V
Propagation Delay Time Ns
400 ns
No. Of Channels
2
Supply Voltage Range
4.75V To 5.25V
Operating Temperature Range
0°C To +70°C
Digital Ic Case Style
DIP
No. Of Pins
40
Filter Terminals
DIP
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
1016-1328-5

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
XR88C681CP/40-F
Manufacturer:
Linear
Quantity:
185
and Receivers. Table 17 and Table 18 present the relationship between the contents of the CSRs and the clock source
driving the Transmitters and Receivers.
Note: the b suffix denotes a binary expression. x = don’t care value.
Please note that Table 18 calls for the user to specify the
following parameters:
D ACR[7] - the most significant bit (MSB) of the Auxil-
D X - The Extend bit
ACR[7] is the MSB of the Auxiliary Control Register, and
can easily be programmed by writing 1xxxxxxxb or
0xxxxxxxb to the ACR, in order to set or clear,
respectively.
iary Control Register
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
Rev. 2.11
Bit 7
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
CSR[7:4]
CSR[3:0]
Field
Table 18. Bit Format of the Clock Select Registers, CSR[3:0] and CSR[7:4]
Receiver Clock Select
Bit 6
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
Table 17. Bit Format of the Clock Select Registers, CSRA and CSRB
See Table 18
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Bit 5
External - 16X
External - 1X
38.4K
134.5
Timer
X = 0
1200
1050
2400
4800
7200
9600
200
300
600
110
50
Bit 4
ACR[7] = 0
56
External - 16X
External - 1X
X - The Select Extend bit
Each transmitter and receiver, within the DUART has an
extend bit that can be set or cleared by writing the
appropriate data to the channel’s Command Register.
Although this information can be found in Table 3.
Table 19 summarizes these commands, and their effect
on the Extend bits.
115.2K
14.4K
28.8K
57.6K
19.2K
134.5
Timer
X = 1
3600
4800
1800
9600
Bit 3
110
150
75
Bit Rate
Transmitter Clock Select
Bit 2
External - 16X
External - 1X
See Table 18
19.2K
134.5
Timer
X = 0
1200
2000
2400
4800
1800
9600
150
300
600
110
75
ACR[7] = 1
Bit 1
External - 16X
External - 1X
115.2K
14.4K
28.8K
57.6K
38.4K
Timer
134.5
X = 1
3600
4800
7200
9600
200
110
50
Bit 0

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