XR88C681CP/40-F Exar Corporation, XR88C681CP/40-F Datasheet - Page 74

• Manufacturer Part Number: XR88C681CP/40-F
• Description: IC UART CMOS DUAL 40PDIP
• Manufacturer: Exar Corporation
• Type: CMOS Dual Channel UARTr

Specifications of XR88C681CP/40-F

• Number Of Channels: 2, DUART
• Package / Case: 40-DIP (0.600", 15.24mm)
• Features: *
• Fifo's: 1 Byte, 3 Byte
• Voltage - Supply: 5V
• With Parallel Port: Yes
• With Cmos: Yes
• Mounting Type: Through Hole
• Data Rate: 1 Mbps
• Supply Voltage (max): 5.25 V
• Supply Voltage (min): 4.75 V
• Supply Current: 15 mA
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: Through Hole
• Operating Supply Voltage: 5 V
• Propagation Delay Time Ns: 400 ns
• No. Of Channels: 2
• Supply Voltage Range: 4.75V To 5.25V
• Operating Temperature Range: 0°C To +70°C
• Digital Ic Case Style: DIP
• No. Of Pins: 40
• Filter Terminals: DIP
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 1016-1328-5

In this mode:
1. Received data is transmitted on the channel’s TXD
2. The receiver must be enabled but the transmitter need
3. The channel’s TXRDY and TXEMT status bits are
4. The received parity is checked but is not generated for
5. Character framing is checked but the stop bits are
output.
not be enabled.
inactive.
transmission. Thus, transmitted parity is as received.
transmitted as received.
Rev. 2.11
Incoming
Serial Data
Receive Holding
Register
RXDn
(To be read by the CPU)
Figure 39. A Block Diagram Depict Automatic Echo Mode
Receive Shift Register
To Data Bus
8
RXCn
74
6. A received break is echoed as received until the next
7. CPU to receiver communications operates normally,
Each DUART channel can be configured into one of two
diagnostic modes.
Local Loopback Mode
This mode is selected by setting MR2n[7:6] = 10.
Figure 40 is a diagram depicting Local Loopback Mode
operation.
TXCn
valid start bit is detected.
but the CPU to transmitter link is disabled.
Transmit Shift Register
CPU has no access to
the Transmitter
TXDn
Transmit Holding
Register
Outgoing Serial
Data