XRT94L43IB-F Exar Corporation, XRT94L43IB-F Datasheet - Page 102

• Manufacturer Part Number: XRT94L43IB-F
• Description: IC MAPPER SONET/SDH OC12 516BGA
• Manufacturer: Exar Corporation

Specifications of XRT94L43IB-F

• Applications: Network Switches
• Interface: Bus
• Voltage - Supply: 2.5V, 3.3V
• Package / Case: 516-BBGA
• Mounting Type: Surface Mount
• Product: Mapper
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

STS-3/STM-1 TELECOM BUS INTERFACE - RECEIVE DIRECTION
REV. 1.0.2
P
C22
IN
#
STS3RxD_DP_0
EG_DS3E3_FP_4
TxSTS1FP_4
S
IGNAL
N
AME
I/O
O
S
CMOS STS-3/STM-1 Receive (Drop) Telecom Bus - Parity Output Pin -
T
IGNAL
YPE
Channel 0; Egress Direction DS3/E3 Frame Generator Block Fram-
ing Pulse Output pin - Channel 4; Transmit STS-1 Framing Pulse
Output pin - Channel 4:
The function of this output pin depends upon whether or not the STS-3/
STM-1 Telecom Bus Interface for STS-3/STM-1 Channel 0 has been
enabled.
If STS-3/STM-1 Telecom Bus (associated with STS-3/STM-1 Channel 0)
has been enabled - STS-3/STM-1 Receive Telecom Bus - Parity Output
pin:
This output pin can be configured to function as one of the following.
This output pin will ultimately be used (by "drop-side" circuitry) to verify
the verify of the data which is output via the "STS-3/STM-1 Telecom Bus
Interface associated with Channel 0
N
If STS-3/STM-1 Telecom Bus (associated with STS-3/STM-1 Channel 0)
is disabled then the function of this output pin depends upon whether
Channel 4 has been configured to operate in either the DS3/E3 or STS-1
Modes
If Channel 4 is configured to operate in the DS3/E3 Modes -
EG_DS3E3_FP_4 (Egress Direction - DS3/E3 Framing Pulse Output
pin - Channel 4):
If the STS-3/STM-1 Telecom Bus (associated with STS-3/STM-1 Channel
0) is disabled and if Channel 4 is configured to operate in either the DS3
or E3 Modes then this pin will function as the "Egress Direction DS3/E3
Framing Pulse" output pin.
In this mode, the Frame Generator block (associated with Channel 4) will
pulse this output pin "HIGH" for one DS3/E3 bit-period, coincident with
the first bit (within a given DS3 or E3 frame) being output via the "DS3/
E3/STS1_Data_OUT_4" output pin.
If Channel 4 is configured to operate in the STS-1 Mode -
TxSTS1_FP_4 (Transmit Direction - STS-1 Framing Pulse Output pin
- Channel 4):
If the STS-3/STM-1 Telecom Bus (associated with STS-3/STM-1 Channel
0) is disabled and if Channel 4 is configured to operate in the STS-1/
STM-0 Mode, then this pin will function as the "Transmit Direction STS-1
Framing Pulse" output pin.
In this mode, the Transmit STS-1 TOH Processor block (associated with
Channel 4) will pulse this output pin "HIGH" for one STS-1 bit-period,
coincident to whenever the very first bit (within a given STS-1 frame)
being output via the "DS3/E3/STS1_DATA_OUT_4" output pin.
N
OTE
OTE
1. The EVEN or ODD parity value of the bits which are output via the
2. The EVEN or ODD parity value of the bits which are being output
: The user can make any one of these configuration selections by
: For those applications in which the XRT94L43 is being interfaced
"STS3RXD_D_0[7:0]" output pins.
via the "STS3RXD_D_0[7:0]" output pins and the states of the
"STS3RXD_PL_0" and "STS3RXD_C1J1_0" output pins.
writing the appropriate value into the "Telecom Bus Control"
Register (Direct Address = 0x013B).
to DS3/E3/STS-1 LIU devices, we recommend that the user NOT
connect this output pin to any LIU input pin.
96
SONET/SDH OC-12 TO 12XDS3/E3 MAPPER
D
ESCRIPTION
XRT94L43