XRT94L43IB-F Exar Corporation, XRT94L43IB-F Datasheet - Page 264
XRT94L43IB-F
Manufacturer Part Number
XRT94L43IB-F
Description
IC MAPPER SONET/SDH OC12 516BGA
Manufacturer
Exar Corporation
Datasheet
1.XRT94L43IB.pdf
(328 pages)
Specifications of XRT94L43IB-F
Applications
Network Switches
Interface
Bus
Voltage - Supply
2.5V, 3.3V
Package / Case
516-BBGA
Mounting Type
Surface Mount
Product
Mapper
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XRT94L43IB-F
Manufacturer:
Exar Corporation
Quantity:
10 000
Part Number:
XRT94L43IB-F
Manufacturer:
EXAR/艾科嘉
Quantity:
20 000
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REV. 1.0.2
STS-3/STM-1 TELECOM BUS INTERFACE - RECEIVE DIRECTION
P
W24
IN
#
STS3RxD_D_2_2
DS3/E3/
STS1_Data_OUT_2
RxSBData_2
S
IGNAL
N
AME
I/O
O
S
CMOS Receive STS-3/STM-1 Telecom Bus - Channel 2 - Output
T
IGNAL
YPE
Data Bus Pin Number 2/DS3/E3 Framer or Transmit STS-1
TOH Processor block line interface output Pin - Channel 1
(DS3/E3/STS1_DATA_OUT_2):
The function of this output pin depends upon whether or not
theSTS-3/STM-1 Telecom Bus Interface, associated with
Channel 2 is enabled.
If STS-3/STM-1 Telecom Bus (Channel 2) has been enabled
- STS-3/STM-1 Receive Telecom Bus - Output Data bus Pin
Number 2: STSRxD_D_2_2:
This output pin along with STS3RxD_D_2[7:3] and
STS3RxD_D_2[1:0] function as the STS-3/STM-1 Receive
(Drop) Telecom Bus - Output Data Bus for Channel 2. The
STS-3/STM-1 Telecom Bus Interface will update the data via
this output upon the rising edge of STS3RxD_CLK_2.
If STS-3/STM-1 Telecom Bus (Channel 2) is disabled - DS3/
E3/STS1_DATA_OUT Line Interface Data output Pin -
Channel 2.
This pin outputs single-rail DS3, E3 or STS-1 data to a DS3/E3/
STS-1 LIU IC. This output pin should be connected to the
TPOS/TDATA input of the DS3/E3/STS-1 LIU IC (correspond-
ing to Channel 2). By default, the data that is output via this
output pin will be updated upon the rising edge of the DS3/E3/
STS1_CLK_OUT_2 signal pin number AC25.
For DS3/E3 Applications
For DS3/E3 Applications the XRT94L43 can be configured to
update this output signal upon the falling edge of the DS3/E3/
STS1_CLK_2 signal by setting Bit 2 (DS3/E3/STS1_CLK_OUT
Invert), within the I/O Control Register - Channel 2 (Indirect
Address = 0x3E, 0x01), (Direct Address = 0x3F01) to a "1".
For STS-1 Applications
The XRT94L43 can not be configured to update the DS3/E3/
STS1_DATA_OUT_2 signal upon the falling edge of DS3/E3/
STS1_CLK_OUT_2.
258
SONET/SDH OC-12 TO 12XDS3/E3 MAPPER
D
ESCRIPTION
XRT94L43
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