XRT94L43IB-F Exar Corporation, XRT94L43IB-F Datasheet - Page 86

• Manufacturer Part Number: XRT94L43IB-F
• Description: IC MAPPER SONET/SDH OC12 516BGA
• Manufacturer: Exar Corporation

Specifications of XRT94L43IB-F

• Applications: Network Switches
• Interface: Bus
• Voltage - Supply: 2.5V, 3.3V
• Package / Case: 516-BBGA
• Mounting Type: Surface Mount
• Product: Mapper
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

REV. 1.0.2
STS-3/STM-1 TELECOM BUS INTERFACE - TRANSMIT DIRECTION
AB25
P
IN
#
TxREFCLK
SSE_POS
S
IGNAL
N
AME
I/O
O
S
CMOS
T
IGNAL
YPE
Transmit STS-3/STM-1 Telecom Bus Reference Clock Output
Pin/Slow-Speed Interface - Egress - Positive Data I/O:
The exact function of this pin depends upon whether or not theSTS-
3/STM-1 Telecom Bus is enabled, and whether the Slow-Speed
Interface is enabled.
Transmit STS-3/STM-1 Telecom Bus Reference Clock Output
Pin:
This pin generates a 19.44MHz clock signal that is ultimately derived
from the Clock Synthesizer block (within the XRT9L43).
If the user configures the STS-3/STM-1 Telecom Bus Interface to
operate in the "Re-Phase OFF" mode, then the device (or entity) that
is transmitting STS-3/STM-1 data (to the Transmit STS-3/STM-1
Telecom Bus Interface) must synchronizes its data transmission to
this output signal.
The user is not required to use this signal if the STS-3/STM-1 Tele-
com Bus Interface has been configured to operate in the "Re-Phase
ON" Mode.
SSE_POS (Slow-Speed Interface - Egress - Port is enabled):
If the Slow-Speed Interface - Egress (SSE) Port is enabled, then this
pin will function as either the SSE_POS output pin or the SSE_POS
input pin.If the user configures the SSE port to operate in the "Insert"
Mode, then the SSE port will be configured to replace any "user-
selected" Egress DS3/E3 or STS-1 data-stream (within the
XRT94L43) with the data that is applied to the SSE_POS and
SSE_NEG input pins. More specifically, in the "Insert" Mode, this pin
will function as the "SSE_POS" input pin. In this case, the SSE port
will sample and latch the contents of the input pin (along with the
SSE_NEG, in a Dual-Rail manner) upon the falling edge of the
SSE_CLK input clock signal.
If the user configures the SSE port to operate in the "Extract" Mode,
then the SSE port will output any "user-selected" Egress DS3/E3 or
STS-1 signal (within the XRT94L43) via this output port. More spe-
cifically, in the "Extract Mode" this pin will function as the "SSE_POS"
output pin. In this case, the SSE port will output data via this pin,
along with the SSE_POS output pin (in a Dual-Rail Manner) upon the
rising edge of the SSE_CLK output signal.
80
SONET/SDH OC-12 TO 12XDS3/E3 MAPPER
D
ESCRIPTION
XRT94L43