ATMEGA32A-ANR Atmel, ATMEGA32A-ANR Datasheet - Page 257
![IC MCU AVR 32K FLASH 44TQFP](/photos/6/70/67042/313-44-tqfp_sml.jpg)
ATMEGA32A-ANR
Manufacturer Part Number
ATMEGA32A-ANR
Description
IC MCU AVR 32K FLASH 44TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA32A-MU.pdf
(353 pages)
Specifications of ATMEGA32A-ANR
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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25.6
8155C–AVR–02/11
Entering the Boot Loader Program
memory by SPM instruction. Similarly, the general Read/Write Lock (Lock Bit mode 3) does not
control reading nor writing by LPM/SPM, if it is attempted.
Table 25-2.
Note:
Table 25-3.
Note:
Entering the Boot Loader takes place by a jump or call from the application program. This may
be initiated by a trigger such as a command received via USART, or SPI interface. Alternatively,
the Boot Reset Fuse can be programmed so that the Reset Vector is pointing to the Boot Flash
start address after a reset. In this case, the Boot Loader is started after a reset. After the applica-
tion code is loaded, the program can start executing the application code. Note that the fuses
cannot be changed by the MCU itself. This means that once the Boot Reset Fuse is pro-
grammed, the Reset Vector will always point to the Boot Loader Reset and the fuse can only be
changed through the serial or parallel programming interface.
BLB0 Mode
BLB1 mode
1
2
3
4
1
2
3
4
1. “1” means unprogrammed, “0” means programmed
1. “1” means unprogrammed, “0” means programmed
Boot Lock Bit0 Protection Modes (Application Section)
Boot Lock Bit1 Protection Modes (Boot Loader Section)
BLB02
BLB12
1
1
0
0
1
1
0
0
BLB01
BLB11
1
0
0
1
1
0
0
1
Protection
No restrictions for SPM or LPM accessing the Application
section.
SPM is not allowed to write to the Application section.
SPM is not allowed to write to the Application section, and LPM
executing from the Boot Loader section is not allowed to read
from the Application section. If interrupt vectors are placed in the
Boot Loader section, interrupts are disabled while executing
from the Application section.
LPM executing from the Boot Loader section is not allowed to
read from the Application section. If interrupt vectors are placed
in the Boot Loader section, interrupts are disabled while
executing from the Application section.
Protection
No restrictions for SPM or LPM accessing the Boot Loader
section.
SPM is not allowed to write to the Boot Loader section.
SPM is not allowed to write to the Boot Loader section, and LPM
executing from the Application section is not allowed to read
from the Boot Loader section. If interrupt vectors are placed in
the Application section, interrupts are disabled while executing
from the Boot Loader section.
LPM executing from the Application section is not allowed to
read from the Boot Loader section. If interrupt vectors are
placed in the Application section, interrupts are disabled while
executing from the Boot Loader section.
(1)
(1)
ATmega32A
257
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