ATMEGA64A-MNR Atmel, ATMEGA64A-MNR Datasheet - Page 107

IC MCU AVR 64K FLASH 8QFN

ATMEGA64A-MNR

Manufacturer Part Number
ATMEGA64A-MNR
Description
IC MCU AVR 64K FLASH 8QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet

Specifications of ATMEGA64A-MNR

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
SPI, UART, I2C
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
53
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Operating Temperature Range
- 40 C to + 85 C
Processor To Be Evaluated
ATMEGA64A
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
8160C–AVR–07/09
When OC0 is connected to the pin, the function of the COM01:0 bits depends on the WGM01:0
bit setting.
Normal or CTC mode (non-PWM).
Table 14-3.
Table 14-4
mode.
Table 14-4.
Note:
Table 14-5
rect PWM mode.
Table 14-5.
Note:
• Bit 2:0 – CS02:0: Clock Select
The three Clock Select bits select the clock source to be used by the Timer/Counter, see
14-6.
COM01
COM01
COM01
0
0
1
1
0
0
1
1
0
0
1
1
1. A special case occurs when OCR0 equals TOP and COM01 is set. In this case, the Compare
1. A special case occurs when OCR0 equals TOP and COM01 is set. In this case, the Compare
Table 14-3
Match is ignored, but the set or clear is done at BOTTOM. See
for more details.
Match is ignored, but the set or clear is done at TOP. See
100
shows the COM01:0 bit functionality when the WGM01:0 bits are set to phase cor-
shows the COM01:0 bit functionality when the WGM01:0 bits are set to fast PWM
COM00
Compare Output Mode, non-PWM Mode
Compare Output Mode, Fast PWM Mode
Compare Output Mode, Phase Correct PWM Mode
0
1
0
1
for more details.
COM00
COM00
0
1
0
1
0
1
0
1
shows the COM01:0 bit functionality when the WGM01:0 bits are set to a
Description
Normal port operation, OC0 disconnected.
Reserved.
Clear OC0 on Compare Match when up-counting. Set OC0 on Compare Match
when downcounting.
Set OC0 on Compare Match when up-counting. Clear OC0 on Compare Match
when downcounting.
Description
Normal port operation, OC0 disconnected.
Reserved
Clear OC0 on Compare Match, set OC0 at BOTTOM,
(non-inverting mode).
Set OC0 on Compare Match, clear OC0 at BOTTOM,
(inverting mode).
Description
Normal port operation, OC0 disconnected.
Toggle OC0 on Compare Match.
Clear OC0 on Compare Match.
Set OC0 on Compare Match.
(1)
“Phase Correct PWM Mode” on page
(1)
“Fast PWM Mode” on page 98
ATmega64A
Table
107

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