MCF53014CMJ240J Freescale Semiconductor, MCF53014CMJ240J Datasheet - Page 33
![IC MCU 32BIT 128KB 256MAPBGA](/photos/39/70/397079/bga196_sml.jpg)
MCF53014CMJ240J
Manufacturer Part Number
MCF53014CMJ240J
Description
IC MCU 32BIT 128KB 256MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF5301xr
Datasheet
1.MCF53010CQT240.pdf
(62 pages)
Specifications of MCF53014CMJ240J
Core Processor
Coldfire V3
Core Size
32-Bit
Speed
240MHz
Connectivity
EBI/EMI, Ethernet, I²C, MMC, SPI, SSI, UART/USART, USB, USB OTG
Peripherals
DMA, PWM, WDT
Number Of I /o
83
Program Memory Size
16KB (16K x 8)
Program Memory Type
Cache
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
1.08 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-LBGA
Processor Series
MCF5301x
Core
ColdFire V3
Data Bus Width
32 bit
Data Ram Size
16 bit
Interface Type
I2C, UART, DSPI
Maximum Clock Frequency
400 KHz, 20 MHz, 25 MHz
Number Of Timers
4
Operating Supply Voltage
- 0.5 V to + 2 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
M53015EVB, M53017KIT, M53017MOD
Minimum Operating Temperature
- 40 C
On-chip Adc
13 bit
On-chip Dac
16 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF53014CMJ240J
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
5.9
Freescale Semiconductor
1
Num
R1
R2
R3
R4
R5
R6
R7
R8
During low power STOP, the synchronizers for the RESET input are bypassed and RESET is asserted asynchronously to
the system. Thus, RESET must be held a minimum of 100 ns.
RESET Input valid to FB_CLK High
FB_CLK High to RESET Input invalid
RESET Input valid Time
FB_CLK High to RSTOUT Valid
RSTOUT valid to Config. Overrides valid
Configuration Override Setup Time to RSTOUT invalid
Configuration Override Hold Time after RSTOUT invalid
RSTOUT invalid to Configuration Override High Impedance
Configuration Overrides*:
Reset and Configuration Override Timing
(RCON, Override pins])
Refer to the CCM chapter of the MCF5301x Reference Manual for more information.
RSTOUT
FB_CLK
RESET
GPIO Outputs
Figure 19. RESET and Configuration Override Timing
Table 16. Reset and Configuration Override Timing
GPIO Inputs
1
FB_CLK
Characteristic
Preliminary—Subject to Change Without Notice
R1
MCF5301x Data Sheet, Rev. 5
G3
Figure 18. GPIO Timing
R3
NOTE
G1
G4
R2
R4
G2
Symbol
t
t
R5
t
t
CHROV
ROVCV
t
ROICZ
t
t
t
RVCH
CHRI
RIVT
COS
COH
Preliminary Electrical Characteristics
R6
Min
1.5
20
—
—
9
5
0
0
R4
R7
Max
10
—
—
—
—
—
—
1
R8
t
t
t
Unit
CYC
CYC
CYC
ns
ns
ns
ns
ns
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