MCF53014CMJ240J Freescale Semiconductor, MCF53014CMJ240J Datasheet - Page 39
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MCF53014CMJ240J
Manufacturer Part Number
MCF53014CMJ240J
Description
IC MCU 32BIT 128KB 256MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF5301xr
Datasheet
1.MCF53010CQT240.pdf
(62 pages)
Specifications of MCF53014CMJ240J
Core Processor
Coldfire V3
Core Size
32-Bit
Speed
240MHz
Connectivity
EBI/EMI, Ethernet, I²C, MMC, SPI, SSI, UART/USART, USB, USB OTG
Peripherals
DMA, PWM, WDT
Number Of I /o
83
Program Memory Size
16KB (16K x 8)
Program Memory Type
Cache
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
1.08 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
256-LBGA
Processor Series
MCF5301x
Core
ColdFire V3
Data Bus Width
32 bit
Data Ram Size
16 bit
Interface Type
I2C, UART, DSPI
Maximum Clock Frequency
400 KHz, 20 MHz, 25 MHz
Number Of Timers
4
Operating Supply Voltage
- 0.5 V to + 2 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
M53015EVB, M53017KIT, M53017MOD
Minimum Operating Temperature
- 40 C
On-chip Adc
13 bit
On-chip Dac
16 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF53014CMJ240J
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
5.14
Table 25
5.15
The DMA Serial Peripheral Interface (DSPI) provides a synchronous serial bus with both master and slave operations. Many
of the transfer attributes are programmable.
to the DSPI chapter of the MCF5301x Reference Manual for information on the modified transfer formats used for
communicating with slower peripheral devices.
Freescale Semiconductor
Master Mode
Slave Mode
Name
DS1
DS2
DS3
DS4
DS5
DS6
DS7
DS8
DS9
lists timer module AC timings.
Name
32-Bit Timer Module Timing Specifications
DSPI Timing Specifications
T1
T2
DSPI_SCK Cycle Time
DSPI_SCK Duty Cycle
DSPI_PCSn to DSPI_SCK delay
DSPI_SCK to DSPI_PCSn delay
DSPI_SCK to DSPI_SOUT valid
DSPI_SCK to DSPI_SOUT invalid
DSPI_SIN to DSPI_SCK input setup
DSPI_SCK to DSPI_SIN input hold
DSPI_SCK to DSPI_SOUT valid
DT0IN / DT1IN / DT2IN / DT3IN cycle time
DT0IN / DT1IN / DT2IN / DT3IN pulse width
MDIO (Output)
MDC (Output)
MDIO (Input)
Figure 26. MII Serial Management Channel TIming Diagram
Characteristic
Table 26. DSPI Module AC Timing Specifications
Table 25. Timer Module AC Timing Specifications
Preliminary—Subject to Change Without Notice
Table 26
Characteristic
MCF5301x Data Sheet, Rev. 5
provides DSPI timing characteristics for classic SPI timing modes. Refer
E11
E12
Symbol
t
t
t
SCK
CSC
ASC
—
—
—
—
—
—
E10
E11
E14
(2 × t
(2 × t
(tsck ÷ 2) – 2.0 (tsck ÷ 2) + 2.0
Valid Data
Valid Data
4 x t
SYS
SYS
Min
—
–5
—
9
0
SYS
) – 1.5
) – 3.0
E15
E13
Preliminary Electrical Characteristics
Min
3
1
1
Max
—
—
—
—
—
—
5
4
Max
—
—
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
Unit
t
t
CYC
CYC
Notes
2
3
4
5
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