OM11049,598 NXP Semiconductors, OM11049,598 Datasheet - Page 2

MCU, MPU & DSP Development Tools LPC1114 Demo Boards Cortex M0

OM11049,598

Manufacturer Part Number
OM11049,598
Description
MCU, MPU & DSP Development Tools LPC1114 Demo Boards Cortex M0
Manufacturer
NXP Semiconductors
Datasheet

Specifications of OM11049,598

Processor To Be Evaluated
LPC1114
Processor Series
LPC11xx
Interface Type
I2C, SPI
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
3.3 V
Tool Type
Demonstration Board
Core Architecture
ARM
Cpu Core
ARM Cortex M0
Data Bus Width
32 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
NXP Semiconductors
3. Applications
LPC1111_12_13_14
Product data sheet
Analog peripherals:
Serial interfaces:
Clock generation:
Power control:
Unique device serial number for identification.
Single power supply (1.8 V to 3.6 V).
Available as 48-pin LQFP package, 33-pin HVQFN package, and 44-pin PLCC
package.
eMetering
Alarm systems
10-bit ADC with input multiplexing among 8 pins.
UART with fractional baud rate generation, internal FIFO, and RS-485 support.
Two SPI controllers with SSP features and with FIFO and multi-protocol
capabilities (second SPI on LQFP48 and PLCC44 packages only).
I
data rate of 1 Mbit/s with multiple address recognition and monitor mode.
12 MHz internal RC oscillator trimmed to 1 % accuracy that can optionally be used
as a system clock.
Crystal oscillator with an operating range of 1 MHz to 25 MHz.
Programmable watchdog oscillator with a frequency range of 7.8 kHz to 1.8 MHz.
PLL allows CPU operation up to the maximum CPU rate without the need for a
high-frequency crystal. May be run from the system oscillator or the internal RC
oscillator.
Clock output function with divider that can reflect the system oscillator clock, IRC
clock, CPU clock, and the Watchdog clock.
Integrated PMU (Power Management Unit) to minimize power consumption during
Sleep, Deep-sleep, and Deep power-down modes.
Power profiles residing in boot ROM allowing to optimize performance and
minimize power consumption for any given application through one simple function
call. (LPC1100L series, on LPC111x/102/202/302 only.)
Three reduced power modes: Sleep, Deep-sleep, and Deep power-down.
Processor wake-up from Deep-sleep mode via a dedicated start logic using up to
13 of the functional pins.
Power-On Reset (POR).
Brownout detect with four separate thresholds for interrupt and forced reset.
2
C-bus interface supporting full I
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 10 February 2011
2
C-bus specification and Fast-mode Plus with a
Lighting
White goods
32-bit ARM Cortex-M0 microcontroller
LPC1111/12/13/14
© NXP B.V. 2011. All rights reserved.
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