A2F500M3G-FGG256 Actel, A2F500M3G-FGG256 Datasheet - Page 84

• Manufacturer Part Number: A2F500M3G-FGG256
• Description: FPGA - Field Programmable Gate Array 500K System Gates
• Manufacturer: Actel

Specifications of A2F500M3G-FGG256

• Processor Series: A2F500
• Core: ARM Cortex M3
• Number Of Logic Blocks: 24
• Maximum Operating Frequency: 100 MHz
• Number Of Programmable I/os: 117
• Data Ram Size: 64 KB
• Delay Time: 50 ns
• Supply Voltage (max): 3.6 V
• Supply Current: 2 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: 0 C
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: A2F-Eval-Kit, A2F-Dev-Kit, FlashPro 3, FlashPro Lite, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA
• Mounting Style: SMD/SMT
• Supply Voltage (min): 1.5 V
• Number Of Gates: 500000
• Package / Case: FPBGA-256
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

SmartFusion DC and Switching Characteristics
Figure 2-38 • FIFO FULL Flag and AFULL Flag Assertion
Figure 2-39 • FIFO EMPTY Flag and AEMPTY Flag Deassertion
Figure 2-40 • FIFO FULL Flag and AFULL Flag Deassertion
2- 72
(Address Counter)
(Address Counter)
(Address Counter)
AEMPTY
WA/RA
WCLK
FULL
AFULL
EMPTY
WA/RA
WCLK
RCLK
WA/RA
RCLK
AFULL
WCLK
FULL
MATCH (FULL)
MATCH
(EMPTY)
NO MATCH
1st Rising
After 1st
Edge
Write
1st Rising
After 1st
Read
Edge
NO MATCH
NO MATCH
t
NO MATCH
2nd Rising
CYC
After 1st
Edge
Write
1st Rising
After 2nd
NO MATCH
Edge
Read
NO MATCH
t
RCKEF
R e visio n 6
t
WCKF
t
CKAF
NO MATCH
NO MATCH
Dist = AFF_TH
NO MATCH
NO MATCH
t
WCKFF
t
CKAF
t
CKAF
Dist = AEF_TH + 1
MATCH (FULL)
Dist = AFF_TH – 1