A2F500M3G-FGG256 Actel, A2F500M3G-FGG256 Datasheet - Page 89
![FPGA - Field Programmable Gate Array 500K System Gates](/photos/16/14/161496/lpsilverchip_sml.jpg)
A2F500M3G-FGG256
Manufacturer Part Number
A2F500M3G-FGG256
Description
FPGA - Field Programmable Gate Array 500K System Gates
Manufacturer
Actel
Datasheet
1.A2F500M3G-FGG256.pdf
(192 pages)
Specifications of A2F500M3G-FGG256
Processor Series
A2F500
Core
ARM Cortex M3
Number Of Logic Blocks
24
Maximum Operating Frequency
100 MHz
Number Of Programmable I/os
117
Data Ram Size
64 KB
Delay Time
50 ns
Supply Voltage (max)
3.6 V
Supply Current
2 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
0 C
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
A2F-Eval-Kit, A2F-Dev-Kit, FlashPro 3, FlashPro Lite, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA
Mounting Style
SMD/SMT
Supply Voltage (min)
1.5 V
Number Of Gates
500000
Package / Case
FPBGA-256
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
A2F500M3G-FGG256
Manufacturer:
Microsemi SoC
Quantity:
10 000
Company:
Part Number:
A2F500M3G-FGG256I
Manufacturer:
Microsemi SoC
Quantity:
10 000
Part Number:
A2F500M3G-FGG256I
Manufacturer:
MICROSEMI/美高森美
Quantity:
20 000
Figure 2-41 • Temperature Error Versus External Capacitance
Table 2-93 • ADC Specifications
Specification
Input voltage range (for driving ADC
over its full range)
Gain error
Input referred offset voltage
Integral non-linearity (INL)
Differential non-linearity (DNL)
Signal to noise ratio
Note:
All 3.3 V supplies are tied together and varied from 3.0 V to 3.6 V. 1.5 V supplies are held constant.
Analog-to-Digital Converter (ADC)
Unless otherwise noted, ADC direct input performance is specified at 25°C with nominal power supply
voltages, with the output measured using the external voltage reference with the internal ADC in 12-bit
mode and 500 KHz sampling frequency, after trimming and digital compensation.
1.00E -06
-1
-2
-3
-4
-5
-6
-7
1
0
1.00E -05
–40ºC to +100ºC
–40ºC to +100ºC
RMS deviation from BFSL
1.00E -04
12-bit mode
10-bit mode
8-bit mode
12-bit mode
10-bit mode
8-bit mode
Capacitance (μF)
Test Conditions
1.00E -03
R e v i s i o n 6
1.00E -02
SmartFusion Intelligent Mixed Signal FPGAs
1.00E -01
Min.
62
Typ.
2.56
±0.4
±0.4
1.71
0.60
0.80
1.00E+00
0.2
2.4
0.2
±1
±1
64
Max.
±0.7
±0.7
1.00
0.33
0.94
0.23
±2
±2
Units
LSB
LSB
LSB
LSB
LSB
LSB
mV
dB
%
%
V
2- 77