AFS250-PQG208 Actel, AFS250-PQG208 Datasheet - Page 119
AFS250-PQG208
Manufacturer Part Number
AFS250-PQG208
Description
FPGA - Field Programmable Gate Array 250K System Gates
Manufacturer
Actel
Datasheet
1.AFS600-PQG208.pdf
(330 pages)
Specifications of AFS250-PQG208
Processor Series
AFS250
Core
IP Core
Maximum Operating Frequency
1098.9 MHz
Number Of Programmable I/os
93
Data Ram Size
36864
Supply Voltage (max)
1.575 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Development Tools By Supplier
AFS-Eval-Kit, AFS-BRD600, FlashPro 3, FlashPro Lite, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA
Mounting Style
SMD/SMT
Supply Voltage (min)
1.425 V
Number Of Gates
250 K
Package / Case
PQFP-208
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AFS250-PQG208
Manufacturer:
NXP
Quantity:
8 000
Company:
Part Number:
AFS250-PQG208I
Manufacturer:
MPS
Quantity:
12 000
Company:
Part Number:
AFS250-PQG208I
Manufacturer:
Microsemi SoC
Quantity:
10 000
Part Number:
AFS250-PQG208I
Manufacturer:
MICROSEMI/美高森美
Quantity:
20 000
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ADC Description
The Actel Fusion ADC is a 12-bit SAR ADC. It offers a wide variety of features for different use models.
Figure 2-81
Figure 2-81 • ADC Simplified Block Diagram
•
•
•
•
•
•
•
Analog Quads
Signals from
Configurable resolution: 8-bit, 10-bit, and 12-bit mode
DNL: 0.6 LSB for 10-bit mode
INL: 0.4 LSB for 10-bit mode
No missing code
Internal VAREF = 2.56 V
Maximum Sample Rate = 600 Ksps
Power-up calibration and dynamic calibration after every sample to compensate for temperature
drift over time
shows a block diagram of the Fusion ADC.
32
CHNUMBER
SYSCLK
Analog
MUX
R e v i s i o n 1
TVC
STC
VAREF
SAR ADC
Actel Fusion Family of Mixed Signal FPGAs
ADCCLK
STATUS
MODE
12
CALIBRATE
SAMPLE
BUSY
DATAVALID
RESULT
2- 103
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