AFS250-PQG208 Actel, AFS250-PQG208 Datasheet - Page 185

• Manufacturer Part Number: AFS250-PQG208
• Description: FPGA - Field Programmable Gate Array 250K System Gates
• Manufacturer: Actel

Specifications of AFS250-PQG208

• Processor Series: AFS250
• Core: IP Core
• Maximum Operating Frequency: 1098.9 MHz
• Number Of Programmable I/os: 93
• Data Ram Size: 36864
• Supply Voltage (max): 1.575 V
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Development Tools By Supplier: AFS-Eval-Kit, AFS-BRD600, FlashPro 3, FlashPro Lite, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA
• Mounting Style: SMD/SMT
• Supply Voltage (min): 1.425 V
• Number Of Gates: 250 K
• Package / Case: PQFP-208
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 2-89 • Summary of I/O Timing Characteristics – Software Default Settings
I/O Standard
3.3 V LVTTL/
3.3 V LVCMOS
2.5 V LVCMOS 12 mA High 35
1.8 V LVCMOS 12 mA High 35
1.5 V LVCMOS 12 mA High 35
3.3 V PCI
3.3 V PCI-X
3.3 V GTL
2.5 V GTL
3.3 V GTL+
2.5 V GTL+
HSTL (I)
HSTL (II)
SSTL2 (I)
SSTL2 (II)
SSTL3 (I)
SSTL3 (II)
LVDS
LVPECL
Notes:
1. For specific junction temperature and voltage-supply levels, refer to
2. Resistance is used to measure I/O propagation delays as defined in PCI specifications. See
for connectivity. This resistor is not required during normal operation.
Commercial Temperature Range Conditions: T
Worst-Case VCCI = I/O Standard Dependent
Applicable to Pro I/Os
12 mA High 35
25 mA High 10
25 mA High 10
35 mA High 10
33 mA High 10
15 mA High 20
17 mA High 30
21 mA High 30
16 mA High 30
24 mA High 30
24 mA High
24 mA High
PCI-X
8 mA
spec
spec
PCI
Per
Per
High 10 25
High 10 25
High 20
–
–
25 0.49 1.55 0.03 2.19
25 0.49 1.59 0.03 1.83
25 0.49 1.53 0.03 1.19
25 0.49 1.65 0.03 1.13
50 0.49 2.37 0.03 1.59
25 0.49 2.26 0.03 1.59
50 0.49 1.59 0.03 1.00
25 0.49 1.62 0.03 1.00
50 0.49 1.72 0.03 0.93
25 0.49 1.54 0.03 0.93
–
–
–
–
–
–
2
2
0.49 2.74 0.03 0.90 1.17 0.32 2.79 2.14 2.45 2.70 4.46 3.81 ns
0.49 2.80 0.03 1.13 1.24 0.32 2.85 2.61 2.51 2.61 4.52 4.28 ns
0.49 2.83 0.03 1.08 1.42 0.32 2.89 2.31 2.79 3.16 4.56 3.98 ns
0.49 3.30 0.03 1.27 1.60 0.32 3.36 2.70 2.96 3.27 5.03 4.37 ns
0.49 2.09 0.03 0.78 1.25 0.32 2.13 1.49 2.45 2.70 3.80 3.16 ns
0.49 2.09 0.03 0.77 1.17 0.32 2.13 1.49 2.45 2.70 3.80 3.16 ns
0.49 1.57 0.03 1.36
0.49 1.60 0.03 1.22
R e v i s i o n 1
J
= 70°C, Worst-Case VCC = 1.425 V,
–
–
–
–
–
–
–
–
–
–
–
–
Table 3-6 on page 3-7
0.32 1.52 1.55 0.00 0.00 3.19 3.22 ns
0.32 1.61 1.59 0.00 0.00 3.28 3.26 ns
0.32 1.56 1.53 0.00 0.00 3.23 3.20 ns
0.32 1.68 1.57 0.00 0.00 3.35 3.24 ns
0.32 2.42 2.35 0.00 0.00 4.09 4.02 ns
0.32 2.30 2.03 0.00 0.00 3.97 3.70 ns
0.32 1.62 1.38 0.00 0.00 3.29 3.05 ns
0.32 1.65 1.32 0.00 0.00 3.32 2.99 ns
0.32 1.75 1.37 0.00 0.00 3.42 3.04 ns
0.32 1.57 1.25 0.00 0.00 3.24 2.92 ns
–
–
Actel Fusion Family of Mixed Signal FPGAs
–
–
–
–
for derating values.
Figure 2-121 on page 2-199
–
–
–
–
–
–
–
–
2- 169
ns
ns