LFXP2-5E-5FTN256C Lattice, LFXP2-5E-5FTN256C Datasheet - Page 12

• Manufacturer Part Number: LFXP2-5E-5FTN256C
• Description: FPGA - Field Programmable Gate Array 5K LUTs 172I/O Inst- on DSP 1.2V -5 Spd
• Manufacturer: Lattice
• Series: LatticeXP2r

Specifications of LFXP2-5E-5FTN256C

• Number Of Macrocells: 5000
• Maximum Operating Frequency: 200 MHz
• Number Of Programmable I/os: 172
• Data Ram Size: 10 KB
• Supply Voltage (max): 1.14 V
• Supply Current: 17 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Supply Voltage (min): 1.26 V
• Package / Case: FTBGA-256
• No. Of Logic Blocks: 5000
• No. Of Macrocells: 2500
• Family Type: LatticeXP2
• No. Of Speed Grades: 5
• Total Ram Bits: 166Kbit
• No. Of I/o's: 172
• Clock Management: PLL
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
Figure 2-6. Primary Clock Sources for XP2-17
PLL Input
PLL Input
Clock
Clock
Input
Input
Note: This diagram shows sources for the XP2-17 device. Smaller LatticeXP2 devices have two GPLLs.
GPLL
GPLL
CLK
DIV
From Routing
Clock Input
to Eight Quadrant Clock Selection
Primary Clock Sources
Clock Input
Clock Input
2-9
From Routing
Clock Input
LatticeXP2 Family Data Sheet
GPLL
GPLL
CLK
DIV
PLL Input
Clock
Input
Clock
Input
PLL Input
Architecture