LFXP2-5E-5FTN256C Lattice, LFXP2-5E-5FTN256C Datasheet - Page 44

• Manufacturer Part Number: LFXP2-5E-5FTN256C
• Description: FPGA - Field Programmable Gate Array 5K LUTs 172I/O Inst- on DSP 1.2V -5 Spd
• Manufacturer: Lattice
• Series: LatticeXP2r

Specifications of LFXP2-5E-5FTN256C

• Number Of Macrocells: 5000
• Maximum Operating Frequency: 200 MHz
• Number Of Programmable I/os: 172
• Data Ram Size: 10 KB
• Supply Voltage (max): 1.14 V
• Supply Current: 17 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Supply Voltage (min): 1.26 V
• Package / Case: FTBGA-256
• No. Of Logic Blocks: 5000
• No. Of Macrocells: 2500
• Family Type: LatticeXP2
• No. Of Speed Grades: 5
• Total Ram Bits: 166Kbit
• No. Of I/o's: 172
• Clock Management: PLL
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Architecture
Lattice Semiconductor
LatticeXP2 Family Data Sheet
Density Shifting
The LatticeXP2 family is designed to ensure that different density devices in the same family and in the same pack-
age have the same pinout. Furthermore, the architecture ensures a high success rate when performing design
migration from lower density devices to higher density devices. In many cases, it is also possible to shift a lower uti-
lization design targeted for a high-density device to a lower density device. However, the exact details of the final
resource utilization will impact the likely success in each case.
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